EF4442 Datasheet, PDF (12/21 Pages) ATMEL Corporation – ARINC 429 Multi-channel Buffer Receiver (RTA) (N Channel, Silicon Gate)

Table 7. Static Characteristics (Continued)
(V_CC = 5.0V ± 5%; V_SS = 0V; -55°C < TC < + 125°C)
Symbol
Characteristics
P_D
Power dissipation
f
Maximum operating frequency in A mode
F
Maximum operating frequency in B mode
Min
Typ
Max
Unit
310
550
mW
500
2000
kHz
1000
2000
kHz
Dynamic Characteristics .
Table 8. Bus Timing Characteristics (Load Conditions, see Figure 9)
(V_CC = 5.0V ± 5%; V_SS = 0V; -55°C < TC < +125°C)
Symbol
Characteristic
Min
Max
Unit
Read – A Mode (Figure 4)
t_AH
Address Input Hold Time
A0-A1, RW/INH, CS
10
ns
T_ACC
Data Access Time⁽¹⁾
D0-D7
300
ns
t_DH
Data Output Hold Time
D0-D7
10
ns
Write – A Mode (Figure 5)
t_AS A0-A1ns Address Input Setup Time
A0-A1, RW/INH, CS
50
ns
t_AH
Address Input Hold Time
A0-A1, RW/INH, CS
10
ns
t_DS
Data Set Up Time
D0-D7
100
ns
t_DH
Data Input Hold Time
D0-D7
50
ns
Read – B Mode (Figure 6)
t_AS
Address Setup Time
A0-A1, RW/INH, CS
50
ns
t_AH
Address Input Hold Time
A0-A1, RW/INH, CS
10
ns
t_DH
Data Output Hold Time
0-N1, D0-D7
10
ns
t_ACC
Data Access Time
N0-N1, D0-D7
300
ns
t_SI
RW/INH Setup Time
50
ns
Note: 1. See condition of validity for the access time of EF4442 status register at high temperature (Tc ³ +85°C) in “Annexe 1:
EF4442 ARINC Controller/Bug Description:” on page 20.
Table 9. Clock Timing Characteristics (see Figure 8)
Symbol
Characteristic
t_CA
A Mode Cycle Time
t_CB
B Mode Cycle Time
t_WH
Pulse Width – Low 2000
t_WL
Pulse Width – High
tr, tf
Rise Time, Fall Time
Min
Max
Unit
500
2000
ns
500
1000
ns
180
2000
ns
180
2000
ns
15
ns
12 EF4442
2112A–HIREL–11/02