SAM4C_14 Datasheet, PDF (1290/1303 Pages) ATMEL Corporation – Atmel | SMART ARM-based Flash MCU

Table 53-1.
Doc. Rev.
11102E
06-Oct-14
SAM4C Datasheet Rev. 11102E Revision History (Continued)
Changes
Section 35. “Universal Asynchronous Receiver Transmitter (UART)”
‘MCK’ replaced by ‘peripheral clock’ throughout.
Section 36. “Universal Synchronous Asynchronous Receiver Transmitter (USART)”
‘MCK’ replaced by ‘peripheral clock’ throughout.
Section 36.2 “Embedded Characteristics”: Added ‘Digital Filter on Receive LIne’ bullet
Updated Figure 36-1 “USART Block Diagram”.
Removed table “SPI Operating Mode”.
Section 36.6.1 “Baud Rate Generator”: updated 4th paragraph and figure.
Updated information on RXIDLEV bit in Section 36.6.3.2 “Manchester Encoder” and Section 36.7.21 “USART
Manchester Configuration Register”.
Updated Figure 36-36 “Example of RTS Drive with Timeguard”.
Table 36-7 “Possible Values for the Fi/Di Ratio”: in top row, replaced “774” with “744”.
Section “Transmit Character Repetition”: updated 3rd paragraph.
Section “Disable Successive Receive NACK”: updated last sentence.
Section 36.6.7.5 “Character Transmission”: INACK replaced by WRDBT.
Table 36-14 “Register Mapping”: US_MAN reset value corrected to 0x30011004.
Section 36.7.3 “USART Mode Register”: Updated USART_MODE, USCLKS and PAR field descriptions. Added note
on MAX_ITERATION field to DSNACK bit description.
Section 36.7.4 “USART Mode Register (SPI_MODE)”: Deleted CHMODE filed description and added CLKO bit.
Updated ENDRX, ENDTX, TXBUFE, and RXBUFF bit descriptions in Section 36.7.5 “USART Interrupt Enable
Register”, Section 36.7.6 “USART Interrupt Enable Register (SPI_MODE)”, Section 36.7.7 “USART Interrupt Disable
Register”, Section 36.7.9 “USART Interrupt Mask Register” and Section 36.7.11 “USART Channel Status Register”.
Updated RXRDY, TXRDY, TXEMPTY, ITER and CTSIC bit descriptions in Section 36.7.11 “USART Channel Status
Register”.
Updated RXRDY, TXRDY, and TXEMPTY bit descriptions in Section 36.7.12 “USART Channel Status Register
(SPI_MODE)”
Section 36.7.18 “USART FI DI RATIO Register”: FI_DI_RATIO field now 11 bits wide and updated description.
Section 37. “Timer Counter (TC)”
‘MCK’ replaced by ‘peripheral clock’ throughout.
Added Section 37.6.14.6 “Missing Pulse Detection and Auto-correction”.
Section 37.7.14 “TC Block Mode Register”: Removed FILTER bit (register bit 19 now reserved). Added AUTOC bit
and MAXCMP field.
Section 37.7.18 “TC QDEC Interrupt Status Register”: Added MPE bit.
Section 39. “Segment Liquid Crystal Display Controller (SLCDC)”
‘SCLK’ replaced by ‘SLCK’ throughout.
Updated Section 39.5.2 “Power Management”.
In Section 39.5 “Product Dependencies”, removed section “Number of Segments and Commons”.
Revised Section 39.6.7 “Disabling the SLCDC” (was “Disable Sequence”).
Section 39.8.8 “SLCDC Interrupt Mask Register”: Modified access to Read-only.
Updated DIS bit descriptions.
1290
SAM4C Series [DATASHEET]
Atmel-11102E-ATARM-SAM4C32-SAM4C16-SAM4C8-Datasheet_06-Oct-14