SAM4C_14 Datasheet, PDF (1154/1303 Pages) ATMEL Corporation – Atmel | SMART ARM-based Flash MCU

• STALLRQS: STALL Request Enable
45.6.26 Device Endpoint x Enable Register (Isochronous Endpoints)
Name:
USBFS_DEVEPTIERx [x=0..4] (ISOENPT)
Address: 0x400201F0
Access: Write-only
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
STALLRQS
RSTDTS
–
EPDISHDMAS
15
14
13
12
11
10
9
8
–
FIFOCONS
KILLBKS NBUSYBKES
–
–
–
–
7
6
5
4
SHORTPACKET
ES
CRCERRES
OVERFES
–
3
2
1
0
–
UNDERFES RXOUTES
TXINES
This register view is relevant only if EPTYPE = 0x1 in “Device Endpoint x Configuration Register” on page 1131.
For additional information, see “Device Endpoint x Mask Register (Isochronous Endpoints)” on page 1148.
This register always reads as zero.
The following configuration values are valid for all listed bit names of this register:
0: No effect
1: Clears the corresponding bit in USBFS_DEVEPTIMRx
• TXINES: Transmitted IN Data Interrupt Enable
• RXOUTES: Received OUT Data Interrupt Enable
• UNDERFES: Underflow Interrupt Enable
• OVERFES: Overflow Interrupt Enable
• CRCERRES: CRC Error Interrupt Enable
• SHORTPACKETES: Short Packet Interrupt Enable
• NBUSYBKES: Number of Busy Banks Interrupt Enable
• KILLBKS: Kill IN Bank
• FIFOCONS: FIFO Control
• EPDISHDMAS: Endpoint Interrupts Disable HDMA Request Enable
• RSTDTS: Reset Data Toggle Enable
• STALLRQS: STALL Request Enable
1154
SAM4C Series [DATASHEET]
Atmel-11102E-ATARM-SAM4C32-SAM4C16-SAM4C8-Datasheet_06-Oct-14