EP20K400EFC672-1X Datasheet, PDF(57/117 Page) Altera Corporation

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EP20K400EFC672-1X Datasheet, PDF (57/117 Pages) Altera Corporation – Programmable Logic Device Family

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APEX 20K Programmable Logic Device Family Data Sheet

Table 21. 32-Bit APEX 20K Device IDCODE

Device

IDCODE (32 Bits) (1)

Version

(4 Bits)

Part Number (16 Bits)

Manufacturer

Identity (11 Bits)

EP20K30E

EP20K60E

EP20K100

EP20K100E

EP20K160E

EP20K200

EP20K200E

EP20K300E

EP20K400

EP20K400E

EP20K600E

EP20K1000E

0000

1000 0000 0011 0000

1000 0000 0110 0000

0000 0100 0001 0110

1000 0001 0000 0000

1000 0001 0110 0000

0000 1000 0011 0010

1000 0010 0000 0000

1000 0011 0000 0000

0001 0110 0110 0100

1000 0100 0000 0000

1000 0110 0000 0000

1001 0000 0000 0000

000 0110 1110

Notes to Table 21:

(1) The most significant bit (MSB) is on the left.

(2) The IDCODEâs least significant bit (LSB) is always 1.

1 (1 Bit)

(2)

Figure 31 shows the timing requirements for the JTAG signals.

Figure 31. APEX 20K JTAG Waveforms

TMS

TDI

TCK

TDO

Signal

to Be

Captured

Signal

to Be

Driven

t JCP

t JCH

t JCL

t JPSU

tJPZX

tJSSU

tJPCO

tJSH

tJSZX

tJSCO

t JPH

t JPXZ

tJSXZ

Altera Corporation

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