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EP3C120F484C7 Datasheet, PDF (148/274 Pages) Altera Corporation – Cyclone III Device Handbook | |||
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8â6
Chapter 8: External Memory Interfaces in the Cyclone III Device Family
Cyclone III Device Family Memory Interfaces Pin Support
Table 8â1. Cyclone III Device DQS and DQ Bus Mode Support for Each Side of the Device (Part 4 of 4)
Device
EP3C55
EP3C80
EP3C120
Package
Side
484-pin FineLine
BGA/484-pin Ultra
FineLine BGA
780-pin FineLine BGA
484-pin FineLine
BGA/484-pin
Ultra FineLine
BGA
780-pin FineLine BGA
484-pin FineLine BGA
780-pin FineLine BGA
Left
Right
Top
Bottom
Left
Right
Top
Bottom
Left
Right
Top
Bottom
Left
Right
Top
Bottom
Left
Right
Top
Bottom
Left
Right
Top
Bottom
Number
Ã8
Groups
4
4
4
4
4
4
6
6
4
4
4
4
4
4
6
6
4
4
4
4
4
4
6
6
Number
Ã9
Groups
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Number
Ã16
Groups
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Number
Ã18
Groups
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Number
Ã32
Groups
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Number
Ã36
Groups
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Notes to Table 8â1:
(1) This device package does not support Ã32 or Ã36 mode.
(2) For the top side of the device, RUP, RDN, PLLCLKOUT3n, and PLLCLKOUT3p pins are shared with the DQ or DM pins to gain Ã8 DQ group. You
cannot use these groups if you are using the RUP and RDN pins for on-chip termination (OCT) calibration or if you are using PLLCLKOUT3n
and PLLCLKOUT3p.
(3) There is no DM pin support for these groups.
(4) The RUP and RDN pins are shared with the DQ pins. You cannot use these groups if you are using the RUP and RDN pins for OCT calibration.
(5) The Ã8 DQ group can be formed in Bank 2.
(6) The Ã8 DQ group can be formed in Bank 5.
(7) There is no DM and BWS# pins support for these groups.
(8) The RUP pin is shared with the DQ pin to gain Ã9 or Ã18 DQ group. You cannot use these groups if you are using the RUP and RDN pins for
OCT calibration.
Cyclone III Device Handbook
Volume 1
July 2012 Altera Corporation
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