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1GB-AUTO-AS4C64M16D3 Datasheet, PDF (4/86 Pages) Alliance Semiconductor Corporation – Supports JEDEC clock jitter specification
 
 
Figure 2. Block Diagram
CK
CK#
CKE
DLL
CLOCK
BUFFER
RESET#
CS#
RAS#
CAS#
WE#
COMMAND
DECODER
A10/AP
A12/BC#
COLUMN
COUNTER
A0
A9
A11
A12
BA0
BA1
BA2
VSSQ
LDQS
LDQS#
UDQS
UDQS#
ADDRESS
BUFFER
REFRESH
COUNTER
RZQ
DATA
STROBE
BUFFER
DQ0
DQ15
1Gb Auto-AS4C64M16D3
CONTROL
SIGNAL
GENERATOR
MODE
REGISTER
ZQCL
ZQCS
ZQ
CAL
DQ
Buffer
ODT LDM
UDM
8M x 16
CELL ARRAY
(BANK #0)
Column Decoder
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(BANK #1)
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(BANK #2)
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(BANK #3)
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(BANK #4)
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(BANK #5)
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Column Decoder
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CELL ARRAY
(BANK #7)
Column Decoder
Confidential
--4/86
Rev.1.0 June 2015