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1GB-AUTO-AS4C64M16D3 Datasheet, PDF (26/86 Pages) Alliance Semiconductor Corporation – Supports JEDEC clock jitter specification
1Gb Auto-AS4C64M16D3
Table 18. Electrical Characteristics and Recommended A.C. Operating Conditions
(VDD = 1.5V ± 0.075V, TOPER = -40~105 °C)
Symbol
Parameter
tAA
tRCD
tRP
tRC
tRAS
tCK(avg)
tCK (DLL_OFF)
tCH(avg)
tCL(avg)
tDQSQ
tQH
tLZ(DQ)
tHZ(DQ)
tDS(base)
tDH(base)
tDIPW
tRPRE
tRPST
tQSH
tQSL
tWPRE
tWPST
tDQSCK
tLZ(DQS)
tHZ(DQS)
tDQSL
tDQSH
tDQSS
tDSS
tDSH
tDLLK
tRTP
tWTR
tWR
tMRD
tMOD
tCCD
tDAL(min)
Internal read command to first data
ACT to internal read or write delay time
PRE command period
ACT to ACT or REF command period
ACTIVE to PRECHARGE command period
CL=7, CWL=6
CL=8, CWL=6
Average clock period
CL=9, CWL=7
CL=10, CWL=7
CL=11, CWL=8
Minimum Clock Cycle Time (DLL off mode)
Average clock HIGH pulse width
Average Clock LOW pulse width
DQS, DQS# to DQ skew, per group, per access
DQ output hold time from DQS, DQS#
DQ low-impedance time from CK, CK#
DQ high impedance time from CK, CK#
Data setup time to DQS, DQS# referenced
to Vih(ac) / Vil(ac) levels
AC150
Data hold time from DQS, DQS#
referenced to Vih(dc) / Vil(dc) levels
DC100
DQ and DM Input pulse width for each input
DQS,DQS# differential READ Preamble
DQS, DQS# differential READ Postamble
DQS, DQS# differential output high time
DQS, DQS# differential output low time
DQS, DQS# differential WRITE Preamble
DQS, DQS# differential WRITE Postamble
DQS, DQS# rising edge output access
time from rising CK, CK#
DQS and DQS# low-impedance time
(Referenced from RL - 1)
DQS and DQS# high-impedance time
(Referenced from RL + BL/2)
DQS, DQS# differential input low pulse width
DQS, DQS# differential input high pulse width
DQS, DQS# rising edge to CK, CK# rising edge
DQS, DQS# falling edge setup time to
CK, CK# rising edge
DQS, DQS# falling edge hold time from
CK, CK# rising edge
DLL locking time
Internal READ Command to
PRECHARGE Command delay
Delay from start of internal write
transaction to internal read command
WRITE recovery time
Mode Register Set command cycle time
Mode Register Set command update delay
CAS# to CAS# command delay
Auto precharge write recovery + prechargetime
-12
Min. Max.
13.75
20
13.75
-
13.75
-
48.75
-
35
9 * tREFI
1.875
<2.5
1.875
<2.5
1.5
<1.875
1.5
<1.875
1.25
<1. 5
8
-
0.47
0.53
0.47
0.53
-
100
0.38
-
-450
225
-
225
10
-
45
-
360
-
0.9
-
0.3
-
0.4
-
0.4
-
0.9
-
0.3
-
-225
225
-450
225
-
225
0.45
0.55
0.45
0.55
-0.27
0.27
0.18
-
0.18
-
512
-
max (4tCK,
7.5ns)
-
max (4tCK,
7.5ns)
-
15
-
4
-
max
(12tCK, 15ns)
-
4
-
WR + tRP
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCK
tCK
ps
tCK
ps
ps
ps
ps
ps
tCK
tCK
tCK
tCK
tCK
tCK
ps
ps
ps
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ns
tCK
tCK
tCK
tCK
Note
33
33
33
33
33
6
13
13
13,14
13,14
17
17
13,19
11,13
13
13
1
1
13
13, 14
13, 14
29, 31
30, 31
32
32
18
18
Confidential
--26/86
Rev.1.0 June 2015