AK4343 Datasheet, PDF (97/98 Pages) Asahi Kasei Microsystems – Stereo DAC with HP/RCV/SPK-AMP

ASAHI KASEI
MARKING
[AK4343]
AKM
AK4343
XXXXX
1
XXXXX : Date code identifier (5 digits)
Revision History
Date (YY/MM/DD)
06/04/04
06/10/24
Revision
00
01
Reason
First Edition
Spec change
Error correct
Page Contents
35-36
53
65
75
87
88
91
MIC/LINE Input Selector
“When full-differential input is used, the signal
should not be input to the pins marked by “X” in
Table 20.” was added.
Table 20 (Handling of MIC/Line Input Pins) was added.
Stereo Line Output Control Sequence
Power-down mode:
PMLO bit = “1” Æ PMLO bit = “0”
I²C Bus Control Mode
“those most significant 3-bits are fixed to zeros”
Æ “those most significant 2-bits are fixed to zeros”
Register Definitions (Addr=0FH)
HPM bit: “When the HPM bit = “1”, (L+R)/2 signals
are output to Lch and Rch of the Headphone-Amp.
Both PMHPL and PMHPR bits should be “1” when
HPM bit is “1”.
Æ “When the HPM bit = “1”, DAC output signal is
output to Lch and Rch of the Headphone-Amp as
(L+R)/2.”
Control Sequence (Clock Setup: Ext Slave Mode)
MCLK Frequency: 1024fs Æ 256fs
Addr=05H: Data=27H Æ 00H
Control Sequence (Clock Setup: Ext Master Mode)
MCLK Frequency: 1024fs Æ 256fs
Addr=05H: Data=27H Æ 00H
Control Sequence (Headphone Playback)
Digital Volume Level: 0dB Æ −8dB
Addr=0EH: Data=14H Æ 19H
Figure 81: (12) Addr=0EH: Data=00H Æ 11H
MS0478-E-01
- 97 -
2006/10