AK4343 Datasheet, PDF (17/98 Pages) Asahi Kasei Microsystems – Stereo DAC with HP/RCV/SPK-AMP

ASAHI KASEI
„ Timing Diagram
MCKI
LRCK
MCKO
1/fCLK
VIH
VIL
tCLKH
tCLKL
1/fs
tLRCKH
tLRCKL
1/fMCK
50%DVDD
Duty = tLRCKH x fs x 100
tLRCKL x fs x 100
tMCKL
50%DVDD
dMCK = tMCKL x fMCK x 100
Figure 3. Clock Timing (PLL/EXT Master mode)
Note 36. MCKO is not available at EXT Master mode.
[AK4343]
LRCK
BICK
(BCKP = "0")
tLRCKH
tDBF
tBCK
dBCK
50%DVDD
50%DVDD
BICK
(BCKP = "1")
SDTI
tSDS
tSDH
50%DVDD
VIH
VIL
Figure 4. Audio Interface Timing (PLL/EXT Master mode, DSP mode, MSBS = “0”)
MS0478-E-01
- 17 -
2006/10