AK4636 Datasheet, PDF (94/105 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK/Video-AMP

[AK4636]
■ Digital MIC Inputs
FS3-0 bits _X,XXX
(Addr:05H, D5,D2-0)
(1)
ADRST bit _X
(Addr:05H, D7)
0,010
X
Digital MIC
Control
(Addr:27H, D3-0)
ALC1 Control 1
(Addr:06H)
ALC1 Control 2
(Addr:08H)
IVOL7-0 bits
(Addr:09H)
ALC1 Control 3
(Addr:07H)
Signal Select
(Addr:03H)
Filter Co-ef
(Addr:10H-1F)
Filter Select
(Addr:11H D5-4, D0)
ALC1 State
XXH
(2)
XXH
(3)
XXH
(4)
XXH
(5)
XXH
(6)
XXH
(7)
XX....X
(8)
XX1
(9)
ALC1 Disable
0BH
14H
C5H
C5H
A1H
81H
XX....X
011
ALC1 Enable
ALC1 Disable
Example:
PLL Master Mode
Audio I/F Format: MSB justified
Sampling Frequency: 16kHz
Digital MIC setting:
D ata is latched on the DMCLK failing edge
Digital MIC Power Supply “Extenally”
ALC1 setting:Refer to Table 36
HPF : ON (fc=150Hz)
4+1 band EQ : OFF
(1) Addr:05H, Data:02H
(2) Addr:27H, Data:0BH
(3) Addr:06H, Data:14H
(4) Addr:08H, Data:C5H
(5) Addr:09H, Data:C5H
(6) Addr:07H, Data:A1H
(7) Addr:03H, Data:81H
(8-1) Addr:1CH, Data:A9H
(8-2) Addr:1DH, Data:1FH
(8-3) Addr:1EH, Data:53H
(8-4) Addr:1FH, Data:1FH
(9) Addr:11H, Data:11H
PMPFIL bit
(Addr:00H, D7)
PMDM bit
(Addr:27H, D4)
SDTO pin
State
(10)
(13)
(11) ^{291/fs or 1059/fs}
(12)
O data output
Normal
Initialize _{data ouput} O data output
Figure 74. Digital MIC Input Recording Sequence
(10) Addr:00H, Data:80H
(11) Addr:27H, Data:1BH
Recording
(12) Addr:27H, Data:0BH
(13) Addr:00H, Data:00H
<Example>
This sequence is an example of ALC1 setting at fs=16kHz. If the parameter of the ALC1 is changed, please refer to
the Figure 47.
At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up a sampling frequency (FS3-0 bit) and the initializing cycle of programmable filter (ADRST bit). When
the AK4636 is in PLL mode, MIC and Programmable filter should be powered-up in consideration of PLL lock
time after the sampling frequency is changed.
(2) Set up Digital MIC(address 27H)
(3) Set up Timer Select for ALC1 (Addr: 06H)
(4) Set up REF value for ALC1 (Addr: 08H)
(5) Set up IVOL value for ALC1 (Addr: 09H)
(6) Set up LMTH0, RGAIN0, LMAT1-0, ZELM and ALC1 bits (Addr: 07H)
(7) Set up Programmable Filter Path: PFSDO bit = ADCPF bit = “1”
(8) Set up Coefficient of the Programmable Filter (HPF/EQ) Addr: 1CH ~ 1FH, 2CH ~ 2FH, 32H ~ 4FH
(9) Switch ON/OFF of the Programmable Filter (HPF/EQ)
(10) Power-up Programmable Filter: PMPFIL bit = “0” Æ “1”
(11) Power-up Digital MIC: PMDM bit = “0” Æ “1”
The initializing cycle of the digital filter is 1059/fs= 24ms@fs=44.1kHz when ADRST bit = “0”, and
291/fs=18ms@16kHz when ADRST bit = “1”. ALC starts operating at the value set by IVOL (5).
(12) Power-down Digital MIC: PMDM bit = “1” Æ “0”
(13) Power-down Programmable Filter: PMPFIL bit = “1” Æ “0”
MS1012-E-01
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2010/08