AK4636 Datasheet, PDF (31/105 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK/Video-AMP

[AK4636]
■ PLL Slave Mode (PMPLL bit = “1”, M/S bit = “0”)
A reference clock of PLL is selected among the input clocks to the MCKI, BICK or FCK pin. The required clock to the
AK4636 is generated by an internal PLL circuit. Input frequency is selected by PLL3-0 bits. When BICK input frequency
is 16fs, the audio interface format supports Mode 0 only (DSP Mode).
a) PLL reference clock: MCKI pin
BICK and FCK inputs should be synchronized with MCKO output. The phase between MCKO and FCK is not important.
The MCKO pin outputs the frequency selected by FS3-0 bits (Note 5)
AK4636
11.2896MHz, 12MHz, 13.5MHz,
24MHz, 27MHz
DSP or μP
MCKI
MCKO
BICK
FCK
256fs
16fs, 32fs, 64fs
1fs
MCLK
BCLK
FCK
SDTO
SDTI
SDTI
SDTO
Figure 25. PLL Slave Mode 1 (PLL Reference Clock: MCKI pin)
MS1012-E-01
- 31 -
2010/08