AK4636 Datasheet, PDF (101/105 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK/Video-AMP

[AK4636]
3. PLL Slave Mode (MCKI pin)
PMPLL bit
(Addr:01H, D0)
MCKO bit
(Addr:01H, D1)
External MCKI
(1)
(1)
(2)
Input
Example
Audio I/F Format: MSB justified
BICK frequency at Master Mode: 64fs
Input Master Clock Select at PLL Mode: 12MHz
MCKO : Enable
Sampling Frequency:48kHz
(1) Addr:01H, Data:00H
(2) Stop the external clocks
Figure 82. Clock Stopping Sequence (3)
<Example>
(1) Power down of the PLL: PMPLL bit = “1” → “0”
Stop the MCKO output: MCKO bit = “1” → “0”
(2) Stop an external master clock.
4. EXT Slave Mode
External MCKI
External BICK
External FCK
Input
Input
Input
Example
Audio I/F Format: MSB justified
(1)
BICK frequency at Master Mode: 64fs
Input Master Clock Select at PLL Mode: 12MHz
MCKO : Enable
Sampling Frequency:48kHz
(1)
(1) Addr:01H, Data:00H
(1)
(2) Stop the external clocks
Figure 83. Clock Stopping Sequence (4)
<Example>
(1) Stop an external master clock.
■ Power Down
VCOM should be powered-down after the master clock is stopped if clocks are supplied when all blocks except for
VCOM are powered-down. The AK4636 is also powered-down by the PDN pin = “L”. In this case, the registers are
initialized.
MS1012-E-01
- 101 -
2010/08