AK4636 Datasheet, PDF (50/105 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK/Video-AMP

[AK4636]
■ ALC Operation
The ALC (Automatic Level Control) is operated by ALC block. When ADCPF bit = “1”, ALC operation is enable at
recording path. When ADCPF bit = “0”, ALC operation is enable at playback path. ON/OFF switching of ALC operation
is controlled by ALC1 bit for recording and ALC2 bit for playback.
1. ALC Limiter Operation
During the ALC limiter operation, if the output data exceeds the ALC limiter detection level (Table 27), the volume value
is automatically attenuated by the amount defined in LMAT1-0 bits (Table 28).
When ZELMN bit = “0” (zero cross detection valid), the IVL and VOL value is changed by ALC limiter operation at the
individual zero crossing points of Lch and Rch or at the zero crossing timeout. ZTM1-0 bits set the zero crossing timeout
period of both ALC limiter and recovery operation (Table 29). When ALC output level exceeds full-scale at LFST bit =
“1”, VOL value is immediately (Period: 1/fs) changed in 1 step. When ALC output level is less than full-scale, VOL value
is changed at the individual zero crossing point of each channels or at the zero crossing timeout.
When ZELMN bit = “1” (zero cross detection invalid), VOL value is immediately (period: 1/fs) changed by ALC limiter
operation. Attenuation step is fixed to 1 step regardless of the setting of LMAT1-0 bits.
After completing the attenuate operation, unless ALC bit is changed to “0”, the operation repeats when the input signal
level exceeds the ALC limiter detection level.
LMTH1
0
0
1
1
LMTH0 ALC Limiter Detection Level ALC Recovery Waiting Counter Reset Level
0
ALC Output ≥ −2.5dBFS
−2.5dBFS > ALC Output ≥ −4.1dBFS
1
ALC Output ≥ −4.1dBFS
−4.1dBFS > ALC Output ≥ −6.0dBFS
0
ALC Output ≥ −6.0dBFS
−6.0dBFS > ALC Output ≥ −8.5dBFS
1
ALC Output ≥ −8.5dBFS
−8.5dBFS > ALC Output ≥ −12dBFS
Table 27. ALC Limiter Detection Level / Recovery Waiting Counter Reset Level
(default)
LMAT1
0
0
1
1
LMAT0
0
1
0
1
ALC1 Limiter ATT Step
ALC1 Output ALC1 Output ALC1 Output
≥ LMTH
≥ FS
≥ FS + 6dB
1
1
1
2
2
2
2
4
4
1
2
4
Table 28. ALC Limiter ATT Step Setting
ALC1 Output
≥ FS + 12dB
1
(default)
2
8
8
ZTM1
0
0
1
1
ZTM0
Zero Crossing Timeout Period
8kHz
16kHz
44.1kHz
0
128/fs
16ms
8ms
2.9ms
1
256/fs
32ms
16ms
5.8ms
0
512/fs
64ms
32ms
11.6ms
1
1024/fs
128ms
64ms
23.2ms
Table 29. ALC Zero Crossing Timeout Period Setting
(default)
MS1012-E-01
- 50 -
2010/08