AK4650 Datasheet, PDF(63/86 Page) Asahi Kasei Microsystems – 16Bit ΔΣ CODEC with MIC/HP/SPK-AMP & TSC

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AK4650 Datasheet, PDF (63/86 Pages) Asahi Kasei Microsystems – 16Bit ΔΣ CODEC with MIC/HP/SPK-AMP & TSC

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[AK4650]

1) AC-Link Audio Output Frame (SDATAOUT)

[Slot 0]

SY NC

BITCLK

SDATAIN

Valid

Frame

Slot1 Slot2 Slot3

Slot4 Slot5 Slot6 Slot7 Slot8 Slot9 Slot10 Slot11 Slot12

Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0

â1/0â â1/0â â1/0â â1/0â â1/0â â0â â0â â0â â0â â0â â0â â0â â0â â0â â0â â0â

1 BITCLK delay

Slot 0

Slot 1

Figure 48. Slot 0

Slot 0 consists of sixteen bits (bit 15-0). Bit 15-11 are available in the AK4650. Each bit means valid by â1â and invalid by

â0â.

Bit 15 (Valid Frame bit): Validity of the frame

â1â = At least one of bit 14-11 (slot 1-4) must be valid. Bit 10-0 are ignored.

â0â = The AK4650 ignores all following information in the frame.

Bit 14 (Slot 1 valid bit): Validity of slot 1 (command address input)

Bit 13 (Slot 2 valid bit): Validity of slot 2 (command data input)

Bit 12 (Slot 3 valid bit): Validity of slot 3 (DAC Left data input)

Bit 11 (Slot 4 valid bit): Validity of slot 4 (DAC Right data input)

If each bit is â0â, the AK4650 ignores the slot indicated by â0â. On the other hand, if each bit is â1â, the slot is valid. Bit

10-0 should be â0â. (However, when LOOP bit is â1â, loopback is operated regardless of these valid bits.)

A new audio output frame begins with a low to high transition of SYNC. SYNC is synchronous to the rising edge of

BITCLK. On the immediately following falling edge of BITCLK, the AK4650 samples the assertion of SYNC. This

falling edge marks the time when both sides of AC-link are aware of the start of a new audio frame. On the next rising of

BITCLK, the AC â97 controller transitions SDATAOUT into the first bit position of slot 0 (Valid Frame bit). Each new

bit position is presented to AC-link on a rising edge of BITCLK, and subsequently sampled by the AK4650 on the

following falling edge of BITCLK. This sequence ensures that data transitions, and subsequent sample points for both

incoming and outgoing data streams are time aligned.

Data should be sent to the AK4650 with MSB first through the SDATAOUT.

MS0502-E-01

- 63 -

2007/04

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