AK4665A Datasheet, PDF (42/52 Pages) Asahi Kasei Microsystems – 20-Bit Stereo CODEC with MIC/HP-AMP

ASAHI KASEI
[AK4665A]
„ Register Definitions
Addr Register Name
00H Power Management
Default
D7
PMCP
0
D6
D5
D4
D3
D2
D1
D0
0
PMLO PMHPR PMHPL PMDAC PMADC PMVCM
0
0
0
0
0
0
0
PMVCM: Power Management for VCOM Block
0: Power OFF (Default)
1: Power ON
PMADC: Power Management for MIC-Amp and ADC Blocks
0: Power OFF (Default)
1: Power ON
MCLK should be present when PMADC bit is “1”.
PMDAC: Power Management for DAC Block
0: Power OFF (Default)
1: Power ON
When PMDAC bit is changed from “0” to “1”, DAC is powered-up to the current register values (ATT
value, sampling rate, etc).
PMHPL: Power Management for Lch of Headphone Amp
0: Power OFF (Default). HPL pin becomes AVSS (0V).
1: Power ON
PMHPR: Power Management for Rch of Headphone Amp
0: Power OFF (Default). HPR pin becomes AVSS (0V).
1: Power ON
PMLO: Power Management for Stereo Lineout
0: Power OFF (Default). LOUT and ROUT pins become Hi-Z.
1: Power ON
PMCP: Power Management for Charge Pump Circuit
0: Power OFF (Default)
1: Power ON
All blocks can be powered-down by setting PDN pin to “L” regardless of register values setting. In this case, all
control register values are initialized.
When PMVCM, PMADC, PMDAC, PMHPL, PMHPR, PMLO and PMCP bits are “0”, all blocks are
powered-down. The register values remain unchanged. Power supply current is 100µA(typ) in this case. For fully
shut down (typ. 1µA), PDN pin should be “L”.
MS0440-E-01
- 42 -
2006/05