AK4665A Datasheet, PDF (23/52 Pages) Asahi Kasei Microsystems – 20-Bit Stereo CODEC with MIC/HP-AMP

ASAHI KASEI
[AK4665A]
When writing to IVOL7-0 bits continuously, the control register should be written by an interval more than zero crossing
timeout. If not, the IVOL is not changed since zero crossing counter is reset at every write operation. If the same register
value as the previous write operation is written to IVOL, the write operation is ignored and zero crossing counter is not
reset. Therefore, IVOL can be written by an interval less than zero crossing timeout.
ALC1 bit
ALC1 Status
Disable
Enabl e
Disable
IVOL7-0 bits
E1H(+ 30dB )
Internal IVOL
E1H(+ 30dB )
E1(+30dB) --> F1(+36dB )
(1)
E1(+30dB)
(2)
Figure 14. IVOL value during ALC1 operation
(1) ALC1 operation starts from the IVOL value when ALC1 bit is changed to “1”. The wait time from ALC1 bit = “1” to
ALC1 operation start by IVOL7-0 bits is at most recovery time (WTM1-0 bits) plus zero cross timeout period
(ZTM1-0 bits).
(2) Writing to IVOL register (05H) is ignored during ALC1 operation. After ALC1 is disabled, the IVOL changes to the
last written data by zero crossing or timeout. When ALC1 is enabled again, ALC1 bit should be set to “1” by an
interval more than zero crossing timeout period after ALC1 bit = “0”.
„ ADC Output ON/OFF (SDTO pin)
SDTO pin becomes “L” when SDOD bit is “1”.
SDOD bit
SDTO pin
0
Output
Default
1
“L”
Table 17. ADC Output ON/OFF
„ Digital Loopback
ADC output data is internally passed to DAC when LOOP bit is “1”. The external input data to SDTI pin is ignored. This
operation is independent of SDOD bit.
LOOP bit
DAC Input
0
SDTI pin Default
1
ADC Output
Table 18. Digital Loopback
MS0440-E-01
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2006/05