AK7740ET Datasheet, PDF (40/48 Pages) Asahi Kasei Microsystems – 24bit 2ch ADC + 24bit 4ch DAC with Audio DSP

[ASAHI KASEI]
[AK7740ET]
7-3-b) OFRAM rewrite preparation and write (during RUN phase)
This function is used to rewrite OFRAM (offset RAM) during program execution. After inputting the command code,
input a maximum of 16 data bytes to rewrite to a continuous address. Then input the write command code and rewrite
the leading address. Every time the RAM address to be rewritten is specified, the contents of RAM are rewritten. The
following is an example to show how five data bytes from address "10" of the coefficient RAM are rewritten:
Offset RAM execution address 7 8 9 10 11 13 16 11 12 13 14 15
ÈÈ
ÈÈÈ
Rewrite position
} }Ç
}}}
Note that address "13" is not executed until address "12" is rewritten.
Data transfer procedure
* Preparation for rewrite c Command code 98h ( 1 0 0 0 1 1 0 0 0 )
d Data
(D23 . . . . . . D16)
e Data
(D15 . . . . . . D8 )
f Data
( D7 . . . . . . D0 )
* Rewrite
c Command code 94h ( 1 0 0 0 1 0 1 0 0 )
d Address
( 0 0 A5A4 . . . A0)
S_RESET
RQ
SCLK
SI
RDY
SO
10011000 D23 **** D0
10010100 00 A5***A0
AL
(Longer of (16-n) x 2 MCLK
(n: number of data) and AL
max 200ns
RDYLG
Note: The RDY signal will go to high within the maximum of two LRCLKs if the RDYLG
width is programmed to ensure a new address to be rewritten within one sampling cycle.
OFRAM rewriting preparation and writing
<Pre-E-01>
- 40 -
2006/10