AK7740ET Datasheet, PDF (31/48 Pages) Asahi Kasei Microsystems – 24bit 2ch ADC + 24bit 4ch DAC with Audio DSP

[ASAHI KASEI]
[AK7740ET]
7-1-b) Program RAM writes (during reset phase)
Write to the Program RAM during the reset phase with data consisting of a set of seven bytes. When all data has been
transferred, the RDY terminal is set "L". Upon completion of the PRAM write, RDY returns “H” to allow the next
data bit input. When writing data of continuous addresses, input the data as they are (no command code or address is
required). To write discontinuous data, shift the RQ terminal from "H" to "L" again. Then input the command code,
address and data in that order.
Data transfer procedure
c Command code C0h ( 1 1 0 0 0 0 0 0)
d Address upper
( 0 0 0 0 0 0 0 A8)
e Address lower
(A7 . . . . . . . A0)
f Data
(D31 . . . . . . D24)
g Data
(D23 . . . . . . D16)
h Data
(D15 . . . . . . D8)
i Data
(D7 . . . . . . D0)
S_RESET
RQ
SCLK
SI
RDY
SO
S_RESET
RQ
SCLK
SI
RDY
11000000 0000000 A7 ****A1A0 _{D31***** D0 D31***** D0}
Input of continuous address data into PRAM
11000000 0000000A8 A7**A1A0 D31***D0
11000000 0000000A8 A7**A1A0
SO
Input of discontinuous address data into PRAM
<Pre-E-01>
- 31 -
2006/10