AK7740ET Datasheet, PDF (33/48 Pages) Asahi Kasei Microsystems – 24bit 2ch ADC + 24bit 4ch DAC with Audio DSP

[ASAHI KASEI]
[AK7740ET]
7-1-d) Offset RAM write (during reset phase)
The data comprising a set of five bytes is used to perform offset RAM write operations (during reset phase). When all
data has been transferred, the RDY terminal goes to "H". Upon completion of writing into the OFRAM, RDY goes to
"H" to allow the next data to be input. When data of continuous addresses are written, input the data as they are. To
write discontinuous data, shift the RQ terminal from "H" to "L". Then input the command code, address and data in
that order.
Data transfer procedure
c Command code 90h ( 1 0 0 1 0 0 0 0 )
d Address
( 0 0 A5 A4 .. . . A0 )
e Data
(0 0 0 0 0 0 0 0 )
f Data
(0 0 0 D12 D11 * * . D8 )
g Data
(D7 . . . . . . D0 )
S_RESET
RQ
SCLK
SI
RDY
SO
10010000 00A5****A0 00000000 _000D12***D8 D7****D1D0
Input of data into OFRAM
<Pre-E-01>
- 33 -
2006/10