AK7740ET Datasheet, PDF (38/48 Pages) Asahi Kasei Microsystems – 24bit 2ch ADC + 24bit 4ch DAC with Audio DSP

[ASAHI KASEI]
[AK7740ET]
7-2-d) OFRAM data read (during reset phase)
Read out the offset data during the reset phase. To read it, input the command code and the address to be read. After
that, set SI to "H" and SCLK to "L". This completes preparation for outputting the data. Set SI to "L", and the data is
clocked out synchronized with the falling edge of SCLK. If there are continuous addresses to be read, repeat the
above procedure starting from the step where SI is set to “H”.
Data transfer procedure
c Command code 91h ( 1 0 0 0 1 0 0 0 1 )
d Address
( 0 0 A5 . . . . A0)
S_RESET
RQ
SCLK
SI
SO
RDY
10010000 00 A5 **** A0
D12 *** D1 D0 D12 *** D1 D0 D12 *** D1 D0
Reading of OFRAM data
<Pre-E-01>
- 38 -
2006/10