AK4538 Datasheet, PDF (23/70 Pages) Asahi Kasei Microsystems – 16Bit DS CODEC with MIC/HP/SPK-AMP

ASAHI KASEI
[AK4538]
n System Reset
Upon power-up, reset the AK4538 by bringing the PDN pin = “L”. This ensures that all internal registers reset to their
initial values.
The ADC enters an initialization cycle that starts when the PMADC bit is changed from “0” to “1”. The initialization cycle
time is 2081/fs, or 47.2ms@fs=44.1kHz. During the initialization cycle, the ADC digital data outputs of both channels are
forced to a 2's compliment, “0”. The ADC output reflects the analog input signal after the initialization cycle is complete.
The DAC does not require an initialization cycle.
n Audio Interface Format
Three types of data formats are available and are selected by setting the DIF1-0 bits. In all modes, the serial data is MSB
first, 2’s complement format. The SDTO is clocked out on the falling edge of BICK and the SDTI is latched on the rising
edge. All data formats can be used in both master and slave modes. LRCK and BICK are output from AK4538 in master
mode, but must be input to AK4538 in slave mode. If 16-bit data that ADC outputs is converted to 8-bit data by removing
LSB 8-bit, −1 at 16bit data is converted to −1 at 8-bit data. And when the DAC playbacks this 8-bit data, −1 at 8-bit data
will be converted to −256 at 16-bit data and this is a large offset. This offset can be removed by adding the offset of 128 to
16-bit data before converting to 8-bit data.
Mode
0
1
2
3
DIF1
0
0
1
1
DIF0
0
1
0
1
SDTO (ADC) SDTI (DAC)
MSB justified LSB justified
MSB justified
I²S
MSB justified
I²S
N/A
N/A
Table 13. Audio Interface Format
BICK
≥ 32fs
≥ 32fs
≥ 32fs
N/A
Figure
Figure 16
Figure 17
Figure 18
-
Default
LRCK
0123
BICK(32fs)
SDTO(o)
15 14 13
9 10 11 12 13 14 15 0 1 2 3
76543210
9 10 11 12 13 14 15 0 1
15
SDTI(i)
15 14 13
0123
BICK(64fs)
SDTO(o)
15 14 13
7 6 5 4 3 2 1 0 15 14 13
15 16 17 18
31 0 1 2 3
10
7 6 5 4 3 2 1 0 15
15 16 17 18
31 0 1
15
SDTI(i)
Don't Care
15:MSB, 0:LSB
15 14
10
Don't Care
15 14
Lch Data
Rch Data
Figure 16. Mode 0 Timing
210
MS0198-E-01
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