AM1705DPTPA3 Datasheet, PDF (6/164 Pages) Texas Instruments – AM1705 ARM Microprocessor

AM1705
SPRS657D – FEBRUARY 2010 – REVISED MARCH 2013
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Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
This data manual revision history highlights the changes made to the SPRS657C device-specific data
manual to make it an SPRS657D revision.
Scope: Applicable updates to the AM170x ARM Microprocessor device family, specifically relating to the
AM1705 device, which are all now in the production data (PD) stage of development have been
incorporated.
Revision History
SEE
ADDITIONS/MODIFICATIONS/DELETIONS
Global
Updated/Changed Product Status on the 456-MHz Version device from “Advanced Information (AI)” to
“Production Data (PD)”
Section 1.1
Features
EMIFA sub-bullet:
• Added "NAND (8-Bit-Wide Data)"
EMIFA sub-bullet:
• Updated/Changed “16-Bit SDRAM With 256MB Address Space” to “16-Bit SDRAM With 128MB
Address Space”
Figure 1-1
Functional Block
Diagram
Figure 1-1, AM1705 Functional Block Diagram:
• Added “Memory Protection” in the System Control Block
• Added figure title
Section 2.1
Device
Characteristics
Table 2-1, Characteristics of the Device:
• Updated/Changed EMIFB "16-bit , up to 512 Mb SDRAM” to "16-bit, up to 128 MB SDRAM”
• Updated/Changed EMIFA “16bit up 128Mb SDRAM” to “16-Bit up 128 MB SDRAM”
• Updated/Changed the JTAG BSDL_ID DEVIDR0 register from “0x9B7D F02F (Silicon Revision 2.0)” to
“0x9B7D F02F (Silicon Revisions 3.0, 2.1, and 2.0)”
Section 2.3.7
ARM Memory
Mapping
Added “To improve security …” paragraph
Section 2.4
Memory Map
Summary
Table 2-2, AM1705 Top Level Memory Map:
• Updated/Changed “0xC000 0000 - 0xCFFF FFFF” “256M” to “0xC000 0000 - 0xC7FF FFFF” “128M”
EMIFB SDRAM Data
• Updated/Changed “0xD000 0000 - 0xDFFF FFFF” to “0xC800 0000 - 0xDFFF FFFF” "BLANK"
RESERVED row
Section 2.6.4
External Memory
Interface B (SDRAM
only)
Updated/Changed section title from "External Memory Interface B (only SDRAM)" to "External Memory
Interface B (SDRAM only)"
Table 2-6, External Memory Interface B (EMIFB) Terminal Functions:
• Updated/Changed EMB_SDCKE, C13, EMIFB SDRAM clock TYPE from “I/O” to “O”
Section 2.6.17
Reserved and No
Connect
Table 2-19, Reserved and No Connect Terminal Functions:
• Updated/Changed "PWR" to "–" in RSV2 TYPE column
• Added “or left unconnected [do not connect to ground (VSS)].” to RSV3 DESCRIPTION
Section 3.2
SYSCFG Module
Table 3-1, System Configuration (SYSCFG) Module Register Access:
• Updated/Changed 0x01C1 4018, DEVIDR0 REGISTER DESCRIPTION from “Device Identification
Register 0” to “JTAG Identification Register
• Added 0x01C1 4024, CHIPREVID, Silicon Revision Identification Register row
Section 4
Device Operating
Conditions
Section 4.1, Absolute Maximum Ratings Over Operating Junction Temperature Range:
• Updated/Changed Input voltage ranges, V_I I/O, 3.3V (Steady State) from “-0.3V to DVDD + 0.3V” to “-
0.3V to DVDD + 0.35V”
Section 4.2, Recommended Operating Conditions:
• Updated/Change DVDD, Supply voltage, I/O, 3.3V (DVDD, USB0_VDDA33) MIN value from “3.15” to
“3.0” V
Section 4.3, Notes on Recommended Power-On Hours (POH):
• Deleted "Silicon Revision" column in Table 4-1, Recommended Power-On Hours; POH are not silicon
revision dependant
• Deleted "300 MHz" Speed Grade row, N/A to this device
Section 5.3
Power Supplies
Section 5.3.1, Power-On Sequence:
• Updated/Changed, for clarity, the order the device should be powered-on
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