AM1705DPTPA3 Datasheet, PDF (119/164 Pages) Texas Instruments – AM1705 ARM Microprocessor

AM1705
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SPRS657D – FEBRUARY 2010 – REVISED MARCH 2013
Table 5-68 is the list of the EQEP registers.
Table 5-69 shows the eQEP timing requirement and Table 5-70 shows the eQEP switching
characteristics.
EQEP0
BYTE ADDRESS
0x01F0 9000
0x01F0 9004
0x01F0 9008
0x01F0 900C
0x01F0 9010
0x01F0 9014
0x01F0 9018
0x01F0 901C
0x01F0 9020
0x01F0 9024
0x01F0 9026
0x01F0 9028
0x01F0 902A
0x01F0 902C
0x01F0 902E
0x01F0 9030
0x01F0 9032
0x01F0 9034
0x01F0 9036
0x01F0 9038
0x01F0 903A
0x01F0 903C
0x01F0 903E
0x01F0 9040
0x01F0 905C
Table 5-68. EQEP Registers
EQEP1
BYTE ADDRESS
0x01F0 A000
0x01F0 A004
0x01F0 A008
0x01F0 A00C
0x01F0 A010
0x01F0 A014
0x01F0 A018
0x01F0 A01C
0x01F0 A020
0x01F0 A024
0x01F0 A026
0x01F0 A028
0x01F0 A02A
0x01F0 A02C
0x01F0 A02E
0x01F0 A030
0x01F0 A032
0x01F0 A034
0x01F0 A036
0x01F0 A038
0x01F0 A03A
0x01F0 A03C
0x01F0 A03E
0x01F0 A040
0x01F0 A05C
ACRONYM
QPOSCNT
QPOSINIT
QPOSMAX
QPOSCMP
QPOSILAT
QPOSSLAT
QPOSLAT
QUTMR
QUPRD
QWDTMR
QWDPRD
QDECCTL
QEPCTL
QCAPCTL
QPOSCTL
QEINT
QFLG
QCLR
QFRC
QEPSTS
QCTMR
QCPRD
QCTMRLAT
QCPRDLAT
REVID
REGISTER DESCRIPTION
eQEP Position Counter
eQEP Initialization Position Count
eQEP Maximum Position Count
eQEP Position-compare
eQEP Index Position Latch
eQEP Strobe Position Latch
eQEP Position Latch
eQEP Unit Timer
eQEP Unit Period Register
eQEP Watchdog Timer
eQEP Watchdog Period Register
eQEP Decoder Control Register
eQEP Control Register
eQEP Capture Control Register
eQEP Position-compare Control Register
eQEP Interrupt Enable Register
eQEP Interrupt Flag Register
eQEP Interrupt Clear Register
eQEP Interrupt Force Register
eQEP Status Register
eQEP Capture Timer
eQEP Capture Period Register
eQEP Capture Timer Latch
eQEP Capture Period Latch
eQEP Revision ID
t_w(QEPP)
t_w(INDEXH)
t_w(INDEXL)
t_w(STROBH)
t_w(STROBL)
Table 5-69. Enhanced Quadrature Encoder Pulse (eQEP) Timing Requirements
PARAMETER
QEP input period
QEP Index Input High time
QEP Index Input Low time
QEP Strobe High time
QEP Strobe Input Low time
TEST CONDITIONS
Asynchronous/synchronous
Asynchronous/synchronous
Asynchronous/synchronous
Asynchronous/synchronous
Asynchronous/synchronous
MIN
2t_c(SCO)
2t_c(SCO)
2t_c(SCO)
2t_c(SCO)
2t_c(SCO)
MAX
UNIT
cycles
cycles
cycles
cycles
cycles
t_d(CNTR)xin
t_{d(PCS-OUT)QEP}
Table 5-70. eQEP Switching Characteristics
PARAMETER
Delay time, external clock to counter increment
Delay time, QEP input edge to position compare sync output
MIN
MAX
UNIT
4t_c(SCO)
6t_c(SCO)
cycles
cycles
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