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AM1705DPTPA3 Datasheet, PDF (22/164 Pages) Texas Instruments – AM1705 ARM Microprocessor
AM1705
SPRS657D – FEBRUARY 2010 – REVISED MARCH 2013
www.ti.com
2.6.9 Boot
Table 2-11. Boot Terminal Functions(1)
SIGNAL NAME
PIN NO TYPE(2)
PTP
PULL (3)
MUXED
DESCRIPTION
EMA_CS[2]/GP2[5]/BOOT[15]
23
I
IPU EMIFA, GPIO
EMA_WE/AXR0[12]/GP2[3]/BOOT[14]
55
I
IPU
EMIFA, McASP0,
GPIO
EMA_D[7]/MMCSD_DAT[7]/GP0[7]/BOOT[13]
EMA_D[0]/MMCSD_DAT[0]/GP0[0]/BOOT[12]
54
I
44
I
IPU EMIFA, MMC/SD,
IPU GPIO
AHCLKR0/RMII_MHZ_50_CLK/GP2[14]/BOOT[11]
129
I
IPD
McASP0, EMAC,
GPIO
AFSX0/GP2[13]/BOOT[10]
127
I
IPD McASP0, GPIO
UART0_TXD/I2C0_SCL/TM64P0_OUT12/GP5[9]/BOOT[9]
3
I
IPU
UART0, I2C0, Timer0,
GPIO
UART0_RXD/I2C0_SDA/TM64P0_IN12/GP5[8]/BOOT[8]
SPI1_CLK/EQEP1S/GP5[7]/BOOT[7]
2
I
16
I
IPU
UART0, I2C0, Timer0, Boot Selection
GPIO
Signals
IPD SPI1, eQEP1, GPIO
SPI1_SIMO[0]/I2C1_SDA/GP5[6]/BOOT[6]
SPI1_SOMI[0]/I2C1_SCL/GP5[5]/BOOT[5]
14
I
13
I
IPU
SPI1, I2C1, GPIO
IPU
SPI0_SCS[0]/UART0_RTS/EQEP0B/GP5[4]/BOOT[4]
9
I
IPU
SPI0, UART0,
eQEP0, GPIO
SPI0_ENA/UART0_CTS/EQEP0A/GP5[3]/BOOT[3]
12
I
IPU
SPI0, UART0,
eQEP0, GPIO
SPI0_CLK/EQEP1I/GP5[2]/BOOT[2]
11
I
IPD SPIO, eQEP1, GPIO
SPI0_SIMO[0]/EQEP0S/GP5[1]/BOOT[1]
SPI0_SOMI[0]/EQEP0I/GP5[0]/BOOT[0]
18
I
17
I
IPD
SPI0, eQEP0, GPIO
IPD
(1) Boot decoding will be defined in the ROM datasheet.
(2) I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.
Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the the signal name
highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured
function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different
types (i.e., input versus output), the table reflects the pin function direction for that particular peripheral.
(3) IPD = Internal Pulldown resistor, IPU = Internal Pullup resistor
22
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