Z87200 Datasheet, PDF (49/54 Pages) Zilog, Inc. – Spread-Spectrum Transceiver

Zilog
Z87200
Spread-Spectrum Transceiver
at the transmitter is performed by processing the sum fre- The final result assumes that the amplitude of the signal is
quency of the local oscillator and the modulator; when the constant over consecutive symbols and shows that the
4 ^{mixing at the receiver is performed by subtracting the local discriminator function is directly related to the change in}
oscillator from the incoming signal; and when the in-phase phase between successive symbols. Since the interval be-
and quadrature inputs into the I and Q analog-to-digital tween successive symbols is fixed, the discriminator func-
converters are correctly connected such that the in-phase tion can be interpreted as a frequency error signal.
component leads the quadrature component by 90°. Un-
der these conditions, bit 0 of address 36_H should be set to
0; otherwise, the I and Q channels may need to be re-
For DQPSK signals, the Z87200 computes the discrimina-
tor function S_AFC/QPSK(k) as:
versed at the DPSK demodulator (by setting bit 0 of ad-
dress 36_H to 1) in order to achieve proper demodulation.
S_AFC/QPSK(k)=SIGN[Dot(k)] Cross(k) - SIGN[Cross(k)]
Dot(k),
Frequency Error Signal Generation
The frequency discriminator function or error signal is gen-
erated based on the Dot and Cross products. The objec-
tive is an error signal that is proportional to the sine of the
phase difference between the present and prior symbol af-
ter correcting for the estimated phase increments due to
data modulation. In the Z87200 Frequency Discriminator,
the frequency error is calculated through a decision-direct-
ed cross-product algorithm and is then used with the Loop
Filter to correct the NCO frequency. Assuming an input
sin(k), where:
s_in(k) = I(k) + j Q(k),
the algorithm calculates the frequency discriminator func-
tion for DBPSK, s_AFC/BPSK(k), as:
S_AFC/BPSK(k)=SIGN[Dot(k)]*Cross(k)
=SIGN[Dot(k)]*A(k)*A(k-1)*sin(Ø(k)-Ø(k-1))
where the above expression can be reduced to the same
as for DBPSK,
S_AFC/QPSK(k)≈A2(k)*sin(∆Ørot(k)).
BPSK/QPSK Modulation
The Z87200 incorporates a Direct Digital Synthesizer
(DDS) to implement its on-chip BPSK/QPSK modulator. In
the Z87200 design, the NCO and thus the sampling clock
for the modulator is driven by fRXIFCLK; for this reason,
both TXIFCLK and RXIFCLK must be common if the on-
chip BPSK/QPSK modulator is to be used. The
BPSK/QPSK modulator can then be used to generate the
transmit output signal at a programmable IF frequency,
thereby eliminating the need for an external modulator.
Because it is a sampled data system like the Downconvert-
er of the Z87200, however, care must be taken to ensure
that the results of aliasing do not adversely affect the out-
put transmit signal.
=SIGN[Dot(k)]*A(k)*A(k-1)*sin( Ưmod(k) + Ưrot(k))
≈SIGN[Dot(k)]*A2(k)*cos[ ∆Ømod(k)]*sin[ ∆Ørot(k)]
≈A2(k)*sin[∆Ørot(k)]*
DS96WRL0400
4-49