Z87200 Datasheet, PDF (48/54 Pages) Zilog, Inc. – Spread-Spectrum Transceiver

Z87200
Spread-Spectrum Transceiver
THEORY OF OPERATION (Continued)
DQPSK Demodulation
For DQPSK modulation, the possible phase shifts be-
tween successive symbols due to the modulation are 0°,
90°, 180°, and 270°. Here, introduction of a phase shift
(ω_fixed) of ±45° to the previous symbol in the calculation of
the Dot and Cross products is desired in order shift the
possible phase differences to 45°, 135°, 225°, or 315° so
that the DQPSK decision boundaries coincide with the
signs of the Dot and Cross products. In the Z87200 DPSK
demodulator, phase rotation is accomplished in the signal
rotation block by the following transformation of the I and
Q channel values:
I_rot(k)=[ I(k) - Q(k)]/2 for 45 ° rotation
I_rot(k)=[ I(k) + Q(k)]/2 for –45 ° rotation
Q_rot(k)=[ I(k) + Q(k)]/2 for 45 ° rotation
Q_rot(k)=-[ I(k) + Q(k)]/2 for –45 ° rotation
The divide-by-2 is part of the signal rotation function. This
transformation is equivalent to multiplying by (1 ± j)/2 or
(1/√2)e^jØ(fixed) where Ø_fixed is ±45°. In this case, s_out(k) be-
comes:
s_out(k)=A(k).A(k-1)*e^jØ(k)*e^{–jØ(k-1)*}[ω_fixed]*
=A(k).A(k-1)*e^{j[∆Ømod(k)+∆Ørot(k)]*} (1/√2)ej^Ø(fixed)
I²(K)+Q²(k)
( ) Q(k)
.
I(k)
so that
Dot(k)≈(1/√2)A(k)*A(k-1)*cos(∆Ø_mod(k) - Ø_fixed)
Cross(k)≈(1/√2)A(k)*A(k-1)*sin(∆Ø_mod(k) - Ø_fixed)
where the phase rotation Ư_rot(k) due to the frequency off-
set between symbols has been assumed negligible.
Assuming that the transmitted DQPSK modulation phas-
ing is differentially encoded as defined in Table 3, the
phase shift between consecutive symbols should always
be set to –45°; that is, bits 1 and 0 of address 33_H should
be set to 11. Similarly, when the transmission path from
modulator to demodulator does not introduce a frequency
(or phase direction) reversal, the "reverse I and Q" control
function should be disabled; that is, bit 0 of address 36H
should be set to 0. Note that, in the case of DBPSK, the
Zilog
A summary of the Dot(k) and Cross(k) products for the
possible values of ∆Ø_mod(k) and Ø_fixed is shown below, il-
lustrating how the sign of the Dot and Cross products allow
the symbol decision to be made:
Ư_mod(k)
0°
90°
180°
270°
Ø_fixed = -45°
Cross
Dot(k) (k)
+A²
+A²
–A²
+A²
–A²
–A²
+A²
–A²
Ø_fixed = +45°
Ư_mod
Cross
(k)
Dot(k) (k)
0°
+A² –A²
90°
+A² +A²
180°
–A² +A²
270°
–A²
–A²
π/4 QPSK Demodulation
The Z87200 DPSK Demodulator decision logic is de-
signed so that correct DQPSK decisions are made with a
signal rotation of Ø_fixed= –45°. For π/4 QPSK modulation,
however, the modulator itself inserts 45° between consec-
utive symbols, and the possible phase shifts between suc-
cessive symbols due to modulation are 45°, 135°, 225°,
and 315°. As a result, the DPSK Demodulator should be
configured for π/4 QPSK with Ø_fixed=0°.
DQPSK Phasing and I/Q Channel Reversal
The Z87200 uses Differential BPSK and QPSK modulation
and demodulation, meaning that the data is modulated on
the carrier as phase changes. At the demodulator, the data
is recovered by monitoring the phase change over a sym-
bol period.
The Z87200 provides configuration control to specifically
address DPSK phasing and I/Q channel reversal: the Sig-
nal Rotation control register, bits 0 and 1 of address 33_H,
and the Reverse I and Q control register, bit 0 of address
36_H. The first register causes an insertion of ±45° in phase
between consecutive symbols at the receiver, while the
second register switches the I and Q channels presented
to the DPSK demodulator. As discussed in the Z87200 ap-
pendix, the introduction of a phase shift between consec-
utive symbols changes the mapping of the input data with
respect to the decision boundaries defined by the "Cross"
and "Dot" product axes.
phase increments are either 0 or 180° and frequency re-
versal has no impact.
If frequency reversal does take place, however, correct
DQPSK demodulation can be achieved by enabling I and
Q reversal; that is, the entry into bit 0 of address 36_H
should be set to 1. Frequency reversal may occur in the up
or down conversion process, depending on which mixing
product is selected for further processing. No reversal oc-
curs when the following conditions exist: when the mixing
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DS96WRL0400