XC4000 Datasheet, PDF (7/22 Pages) Xilinx, Inc – Third Generation Field-Programmable Gate Arrays

CLB Switching Characteristic Guidelines
Testing of the switching parameters is modeled after testing methods specified by MIL-M-38510/605. All devices are 100%
functionally tested. Since many internal timing parameters cannot be measured directly, they are derived from benchmark timing
patterns. The following guidelines reflect worst-case values over the recommended operating conditions. For more detailed, more
precise, and more up-to-date timing information, use the values provided by the XACT timing calculator and used in the simulator.
Speed Grade
-6
-5
-4
Description
Symbol Min Max Min Max Min Max Units
Combinatorial Delays
F/G inputs to X/Y outputs
F/G inputs via H’ to X/Y outputs
C inputs via H’ to X/Y outputs
CLB Fast Carry Logic
Operand inputs (F1,F2,G1,G4) to COUT
Add/Subtract input (F3) to COUT
Initialization inputs (F1,F3) to COUT
C through function generators to X/Y outputs
IN
C_IN to C_OUT, bypass function generators.
Sequential Delays
Clock K to outputs Q
Set-up Time before Clock K
F/G inputs
F/G inputs via H’
C inputs via H1
C inputs via DIN
C inputs via EC
C inputs via S/R, going Low (inactive)
C_IN input via F'/G'
C_IN input via F'/G' and H'
Hold Time after Clock K
F/G inputs
F/G inputs via H’
C inputs via H1
C inputs via DIN
C inputs via EC
C inputs via S/R, going Low (inactive)
Clock
Clock High time
Clock Low time
Set/Reset Direct
Width (High)
Delay from C inputs via S/R, going High to Q
Master Set/Reset*
Width (High or Low)
Delay from Global Set/Reset net to Q
T_ILO
T_IHO
T_HHO
6.0
4.5
4.0 ns
8.0
7.0
6.0 ns
7.0
5.0
4.5 ns
T_OPCY
T_ASCY
T_INCY
T_SUM
T_BYP
7.0
5.5
5.0 ns
8.0
6.0
5.5 ns
6.0
4.0
3.5 ns
8.0
6.0
5.5 ns
2.0
1.5
1.5 ns
T_CKO
5.0
3.0
3.0 ns
T_ICK
T_IHCK
T_HHCK
T_DICK
T_ECCK
T_RCK
T_CCK
T_CHCK
6.0
8.0
7.0
4.0
7.0
6.0
8.0
10.0
4.5
4.5
ns
6.0
6.0
ns
5.0
5.0
ns
3.0
3.0
ns
4.0
3.0
ns
4.5
4.0
ns
6.0
5.5
ns
7.5
7.3
ns
T_CKI
0
T_CKIH
0
T_CKHH 0
T_CKDI
0
T_CKEC
0
T_CKR
0
0
0
ns
0
0
ns
0
0
ns
0
0
ns
0
0
ns
0
0
ns
T_CH
5.0
T_CL
5.0
4.5
4.0
ns
4.5
4.0
ns
T_RPW
T_RIO
5.0
4.0
4.0
ns
9.0
8.0
7.0 ns
T_MRW 21.0
18.0
18.0
ns
T_MRQ
33.0
31.0
28.0 ns
* Timing is based on the XC4005. For other devices see XACT timing calculator.
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