XC4000 Datasheet, PDF (22/22 Pages) Xilinx, Inc – Third Generation Field-Programmable Gate Arrays

XC4000 Logic Cell Array Family
XC4025 Pinouts (continued)
Pin
PG MQ PG HQ Bound
Pin
PG
Description 223 240 299 304 Scan
Description
223
I/O
- - T9 104 706
I/O
T6
GND
- 158 - -
-
I/O (D1)
V3
I/O (D2) V7 1 5 9 W 8 1 0 3 7 0 9 I/O (RCLK-BUSY/RDY) V2
I/O
U7 1 6 0 X7 1 0 2 7 1 2
I/O
-
VCC
- 1 6 1 X5 -
-
I/O
-
I/O
V6 1 6 2 V8 9 9 7 1 5
I/O
U4
I/O
U6 1 6 3 W7 9 8 7 1 8
I/O
T5
I/O
R8 1 6 4 U8 9 7 7 2 1
I/O (D0, DIN)
U3
I/O
R7 1 6 5 W 6 9 6 7 2 4 SGCK4 (DOUT, I/O) T4
GND T7 1 6 6 X6 9 5 -
CCLK
V1
I/O
- - T8 9 4 727
GND
-
I/O
- - V7 9 3 7 3 0
VCC
R4
I/O
R6 1 6 7 X4 9 2 7 3 3
TDO
U2
I/O
R5 1 6 8 U7 9 1 7 3 6
GND
R3
I/O
V5 1 6 9 W 5 9 0 7 3 9
I/O (A0, WS)
T3
I/O
V4 1 7 0 V6 8 9 7 4 2
PGCK4 (I/O, A1)
U1
I/O
U5 1 7 1 T7 8 8 -
I/O
P3
MQ PG
240 299
1 7 2 X3
1 7 3 U6
1 7 4 V5
- W4
- W3
175 T6
1 7 6 U5
1 7 7 V4
1 7 8 X1
1 7 9 V3
- T5
180 W1
1 8 1 U4
1 8 2 X2
183 W2
1 8 4 V2
1 8 5 R5
HQ
304
87
86
85
84
83
82
81
80
79
78
-
77
76
75
74
73
72
Bound
Scan
745
748
751
754
757
760
763
766
769
-
-
-
-
2
5
8
Pin
Description
I/O
I/O (CS1, A2)
I/O (A3)
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
PG
223
R2
T2
N3
-
-
P4
N4
P2
T1
R1
N2
-
-
M3
P1
N1
M4
MQ PG
240 299
186 T4
1 8 7 U3
1 8 8 V1
- R4
- P5
1 8 9 U2
190 T3
1 9 1 U1
192 P4
1 9 3 R3
1 9 4 N5
195 T2
- R2
196 T1
1 9 7 N4
198 P3
199 P2
HQ
304
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
Bound
Scan
11
14
17
20
23
26
29
32
35
38
41
44
47
-
50
53
56
Pin
Description
I/O
VCC
I/O
I/O
I/O
I/O
I/O (A4)
I/O (A5)
GND
I/O
I/O
I/O
I/O
I/O (A6)
I/O (A7)
GND
PG MQ PG HQ Bound
223 240 299 304 Scan
L4 2 0 0 N3 5 4 5 9
- 2 0 1 R1 5 2 -
-
- M5 51 62
-
- P1 5 0 6 5
-
- M4 49 68
-
- N2 4 8 7 1
M2 2 0 2 N1 4 7 7 4
M3 203 M3 46 77
- 204 -
-
-
L3 205 M2 45 80
L2 206 L5 44 83
L1 207 M1 43 86
K1 208 L4 4 2 8 9
K2 209 L3 4 1 9 2
K3 210 L2 4 0 9 5
K4 211 L1 3 9 -
For a detailed description of the device architecture, see pages 2-9 through 2-31.
For a detailed description of the configuration modes and their timing, see pages 2-32 through 2-55.
For detailed lists of package pinouts, see pages 2-57 through 2-67.
For package physical dimensions and thermal data, see Section 4.
Ordering Information
Example:
Device Type
Speed Grade
XC4010-5PG191C
Temperature Range
Number of Pins
Package Type
Component Availability
PINS
TYPE
84
PLAST.
PLCC
PLAST.
PQFP
100
PLAST.
VQFP
120
TOP
BRAZED CERAM.
CQFP PGA
144
PLAST.
TQFP
156
CERAM
PGA
160
PLAST.
PQFP
164 191 196
208
TOP
TOP
BRAZED CERAM. BRAZED PLAST. METAL
CQFP PGA CQFP PQFP PQFP
223
CERAM.
PGA
225
PLAST.
BGA
240
PLAST. METAL
PQFP PQFP
299 304
CERAM. CERAM.
PGA
PGA
CODE
XC4003
XC4005
XC4006
XC4008
XC4010
XC4010D
XC4013
XC4013D
XC4020
XC4025
PC84 PQ100 VQ100 CB100 PG120 TQ144 PG156 PQ160 CB164 PG191 CB196 PQ208 MQ208 PG223 BG225 PQ240 MQ240 PG299 HQ304
-6 C I
CI
CI
-5 C
C
C
-4 C
C
C
-10
MB
MB
-6 C I
CI
CIMB CI
MB
CI
-5 C I
CI
CI
CI
CI
-4 C
C
C
C
C
-6 C I
CI
CI
CI
-5 C I
CI
CI
CI
-4 C
C
C
C
-6 C I
CI
CI
CI
CI
-5 C I
CI
C
CI
CI
-4 C
C
C
C
C
-10
MB
MB
-6 C I
CI
CIMB MB
CI
CI
CI
-5 C I
CI
CI
CI
CI
CI
-4 C
C
C
C
C
C
-6 C I
CI
CI
CI
-5 C I
CI
CI
CI
-4 C
C
C
C
-6
CI
CI
C I C I (M B) C I
CI
CI
-5
CI
CI
CI
CI
CI
CI
CI
-4
C
C
C
C
C
C
C
-6
CI
CI
CI
CI
-5
CI
CI
CI
CI
-4
C
C
C
C
-6
(C I)
(C I)
(C I)
(C I)
-5
(C I)
(C I)
(C I)
(C I)
-4
(C)
(C)
(C)
(C)
-6
CI
CI
CI
C
-5
CI
CI
CI
C
-4
C = Commercial = 0° to +85° C I = Industrial = -40° to +100° C M = Mil Temp = -55° to +125° C
B = MIL-STD-883C Class B
Parentheses indicates future product plans
2-68