DS583 Datasheet, PDF (6/15 Pages) Xilinx, Inc – System ACE Microprocessor Interface

XPS SYSACE (System ACE) Interface Controller (v1.01a)
XPS System ACE Interface Controller I/O Signals
The I/O signals for the XPS System ACE Interface Controller are listed and described in Table 4.
Table 4: XPS System ACE Interface Controller I/O Signals
Port
Signal Name
Interface
I/O
Initial
State
Description
System Signals
P1 SPLB_Clk
PLB
I
- PLB clock
P2 SPLB_Rst
PLB
I
- PLB reset, active high
PLB Interface Signals
P3 PLB_ABus[0 : C_SPLB_AWIDTH - 1]
PLB
I
- PLB address bus
P4 PLB_PAValid
PLB
I
-
PLB primary address
valid
P5 PLB_MasterID[0 : C_SPLB_MID_WIDTH - 1]
PLB
I
-
PLB current master
identifier
P6 PLB_RNW
PLB
I
- PLB read not write
P7 PLB_BE[0 : C_SPLB_DWIDTH/8 - 1]
PLB
I
- PLB byte enables
P8 PLB_Size[0 : 3]
PLB
I
-
PLB size of requested
transfer
P9 PLB_type[0 : 2]
PLB
I
- PLB transfer type
P10 PLB_wrDBus[0 : C_SPLB_DWIDTH - 1]
PLB
I
- PLB write data bus
Unused PLB Interface Signals
P11 PLB_UABus[0 : C_SPLB_AWIDTH - 1]
PLB
I
- PLB Upper Address bits
P12 PLB_SAValid
PLB
I
-
PLB secondary address
valid
P13 PLB_rdPrim
PLB secondary to
PLB
I
- primary read request
indicator
P14 PLB_wrPrim
PLB secondary to
PLB
I
- primary write request
indicator
P15 PLB_abort
PLB
I
- PLB abort bus request
P16 PLB_busLock
PLB
I
- PLB bus lock
P17 PLB_MSize[0 : 1]
PLB
I
-
PLB data bus width
indicator
P18 PLB_TAttribute[0 : 15]
PLB
I
- PLB transfer attribute
P19 PLB_lockerr
PLB
I
- PLB lock error
P20 PLB_wrBurst
PLB
I
- PLB burst write transfer
P21 PLB_rdBurst
PLB
I
- PLB burst read transfer
P22 PLB_wrPendReq
PLB
I
-
PLB pending bus write
request
P23 PLB_rdPendReq
PLB
I
-
PLB pending bus read
request
P24 PLB_rdPendPri[0 : 1]
PLB
I
-
PLB pending write
request priority
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DS583 December 2, 2009
Product Specification