DS583 Datasheet, PDF (12/15 Pages) Xilinx, Inc – System ACE Microprocessor Interface

XPS SYSACE (System ACE) Interface Controller (v1.01a)
Design Implementation
Target Technology
The target technology is an FPGA listed in the Supported Device Family field of the LogiCORE IP Facts
table.
Device Utilization and Performance Benchmarks
Core Performance
Since the XPS System ACE Controller will be used with other design modules in the FPGA, the
utilization and timing numbers reported in this section are just estimates. When the XPS System ACE
Interface Controller is combined with other designs in the system, the utilization of FPGA resources
and timing will vary from the results reported here.
The XPS System ACE Interface Controller benchmarks are shown in Table 7, Table 8, Table 9, Table 10
and Table 11 for Virtex-4, Virtex-5, Spartan-3adsp, Virtex-6, and Spartan-6 FPGAs respectively.
Table 7: Performance and Resource Utilization Benchmarks for the Virtex-4 FPGA
(xc4vlx40-ff668-10)
Parameter Values
Device Resources
Performance
C_MEM_WIDTH C_BASEADDR C_HIGHADDR Slices
Slice
Flip-Flops
LUTs
F_max
(in MHz)
8
30000000
3FFFFFFF
204
287
147
145.815
16
30000000
3FFFFFFF
218
313
148
145.603
Table 8: Performance and Resource Utilization Benchmarks for the Virtex-5 FPGA
(xc5vlx30-ff676-1)
Parameter Values
Device Resources Performance
C_MEM_WIDTH C_BASEADDR
C_HIGHADDR
Slice Flip-
Flops
LUTs
F_max
(in MHz)
8
30000000
3FFFFFFF
287
112
213.129
16
30000000
3FFFFFFF
311
111
212.089
Table 9: Performance and Resource Utilization Benchmarks for the Spartan-3A DSP FPGA
(xc3sd3400a-fg676-4)
Parameter Values
Device Resources
Performance
C_MEM_WIDTH C_BASEADDR
C_HIGHADDR
Slices
Slice Flip-
Flops
LUTs
F_max
(in MHz)
8
30000000
3FFFFFFF
240
287
117
124.301
16
30000000
3FFFFFFF
252
311
109
102.828
12
www.xilinx.com
DS583 December 2, 2009
Product Specification