XPS16550 Datasheet, PDF (2/20 Pages) Xilinx, Inc – XPS 16550 UART

XPS 16550 UART (v1.00a)
Functional Description
The XPS 16550 UART implements the hardware and software functionality of the ubiquitous National
Semiconductor 16550 UART, that works in both 16450 and 16550 UART modes. For complete details
please refer the National Semiconductor data sheet.
The XPS 16550 UART performs parallel to serial conversion on characters received from the CPU and
serial to parallel conversion on characters received from a modem or microprocessor peripheral.
The XPS 16550 UART is capable of transmitting and receiving 8, 7, 6, or 5 bit characters, with 2, 1.5 or 1
stop bits and odd, even or no parity. The XPS 16550 UART can transmit and receive independently.
The device can be configured and it’s status monitored via the internal register set. The XPS 16550
UART is capable of signaling receiver, transmitter and modem control interrupts. These interrupts can
be masked, are prioritized and can be identified by reading an internal register.
The device contains a 16 bit, programmable, baud rate generator and independent 16 word transmit
and receive FIFOs. The FIFOs can be enabled or disabled through software control.
The top-level block diagram for the XPS 16550 UART is shown in Figure 1.
Figure Top x-ref 1
PLB
PLB
Interface
Module
IPIC
Interface
IPIC_IF ^UART
Interface _UART16550
Serial
Interface
Modem
Interface
Figure 1: XPS UART16550 Top-level Block Diagram
The top level modules of the XPS 16550 UART are:
• PLB Interface Module
• IPIC_IF
• UART16550
The detailed block diagram for the XPS 16550 UART is shown in Figure 2.
2
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DS577 April 18, 2007
Product Specification