DS634 Datasheet, PDF (2/20 Pages) –

IEEE 802.16e CTC Decoder v4.0
After a block of data has been encoded, it is typically used to drive a modulation scheme. The modu-
lated signal is then transmitted over a channel and demodulated by a receiver. The combination of the
transmitter, channel, and receiver results in some form of signal degradation.
X-Ref Target - Figure 1
A
B
D _CTC
Interleaver
Constituent
Y1
Encoder 1
W1
iscontin _{X-Ref Target - Figure 2}
Constituent
Y2
Encoder 2
W2
ds137_01_061705
Figure 1: Block Diagram of IEEE 802.16e CTC Encoder
A
S₁
S₂
S₃
B
ued Y
W
ds137_02_061705
IP ^{Figure 2: CRSC Constituent Encoder from IEEE 802.16e Specification}
The data input to the IEEE 802.16e CTC decoder core is in the form of log-likelihood ratios (LLRs) on
each code bit. As such, the demodulator output symbols must be used in conjunction with knowledge
of the modulation scheme (that is, the constellation) to derive the LLRs for each code bit. It is the output
of this LLR pre-processor that is used to drive the decoder. The number format for the LLRs is true
two’s complement with each sample quantized to widthd bits.
Figure 3 shows a simplified block diagram of the decoding process. The non-interleaved systematic
samples, A and B, along with the parity samples from encoder 1, Y₁ and W₁, are processed by SISO
decoder 1. The interleaved systematic samples, A' and B', along with the parity samples from encoder
2, Y₂ and W₂, are processed by SISO decoder 2.
2
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DS634 December 2, 2009
Product Specification