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DS634 Datasheet, PDF (19/20 Pages) –
IEEE 802.16e CTC Decoder v4.0
X-Ref Target - Figure 11
IEEE 802.16e CTC Coding Perform ance
1.00E+00
1.00E-01
1.00E-02
1.00E-03
D 1.00E-04
1.00E-05
i 1.00E-06
s1.00E-07
c1.00E-08
1.00E-09
o0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
Eb/No (dB)
1 iteration
2 iterations
3 iterations
4 iterations
5 iterations
6 iterations
7 iterations
n Figure 11: BER Performance of Rate 1/3 CTC Code with Block Size N = 240
t Support
i Xilinx provides technical support at www.xilinx.com/support for this LogiCORE product when used
n as described in the product documentation. Xilinx cannot guarantee timing, functionality, or support of
product if implemented in devices that are not defined in the documentation, if customized beyond
u that allowed in the product documentation, or if changes are made to any section of the design labeled
DO NOT MODIFY.
e Refer to the IP Release Notes Guide (XTP025) for further information on this core. There will be a link to
all the DSP IP and then to the relevant core being designed with.
d For each core, there is a master Answer Record that contains the Release Notes and Known Issues list
for the core being used. The following information is listed for each version of the core:
• New Features
IP • Bug Fixes
• Known Issues
Ordering Information
France Telecom, for itself and certain other parties, claims certain intellectual property rights covering
Turbo Codes technology, and has decided to license these rights under a licensing program called the
Turbo Codes Licensing Program. Supply of this IP core does not convey a license nor imply any right to
use any Turbo Codes patents owned by France Telecom, TDF or GET. Contact France Telecom for infor-
mation about its Turbo Codes Licensing Program at the following address:
DS634 December 2, 2009
www.xilinx.com
19
Product Specification