TH58100FT Datasheet, PDF (30/43 Pages) Toshiba Semiconductor – TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

TH58100FT
Multi Block Erase
The device carries out a Multi Block Erase operation when it receives a “D0H” command after some sets of the
address have been input.
After the “D0H” command, the total results of Erase operation is shown through the Status Read (2) command
“71H”.
Pass
D0
71
I/O
Status Read
Fail
command
RY/BY
The Status discription is following.
STATUS
OUTPUT
I/O1
Total Pass/Fail
Pass: 0
I/O2
District 0 Pass/Fail
Pass: 0
Fail: 1
Fail: 1
I/O1 describes total Pass/Fail condition.
If at least one fail occurred in Max 4 Blocks
erase operation, it shows “Fail” condition.
I/O3
District 1 Pass/Fail
Pass: 0
I/O4
District 2 Pass/Fail
Pass: 0
I/O5
District 3 Pass/Fail
Pass: 0
Fail: 1
Fail: 1
Fail: 1
I/O2 describes Pass/Fail condition.
If fail occurred in District 0 area, it shows
“Fail” condition.
I/O6
Not Used
Do not care
I/O3, I/O4 and I/O5 are as same manner
I/O7
Ready/Busy
Ready: 1
Busy: 0
as I/O2.
I/O8
Write Protect
Protect: 0
Not Protect: 1
Internal addressing in relation with the Districts
To use Multi Block Erase operation, the internal addressing should be conscious in relation with the Districts.
· The device consists of 2-chips, each of which have 4 Districts.
· Each District consists from 1024 erase blocks.
· The allocation rule is follows.
Chip 0, District 0: Block 0, Block 4, Block 8, Block 12, ···.., Block 4092
Chip 0, District 1: Block 1, Block 5, Block 9, Block 13, ···.., Block 4093
Chip 0, District 2: Block 2, Block 6, Block 10, Block 14, ···.., Block 4094
Chip 0, District 3: Block 3, Block 7, Block 11, Block 15, ···.., Block 4095
Chip 1, District 0: Block 4096, Block 4100, Block 4104, Block 4108, ···.., Block 8188
Chip 1, District 1: Block 4097, Block 4101, Block 4105, Block 4109, ···.., Block 8189
Chip 1, District 2: Block 4098, Block 4102, Block 4106, Block 4110, ···.., Block 8190
Chip 1, District 3: Block 4099, Block 4103, Block 4107, Block 4111, ···.., Block 8191
Address input restriction for the Multi Block Erase operation
In selecting the blocks for the Multi Block Erase operation, following is the restriction and acceptance.
(Restriction)
It is prohibited to select blocks across 2-chips.
Maximum one block should be selected from each District.
(Acceptance)
There is no order limitation of the District for the address input.
Any number of the Districts can be select for the erase operation.
So, for example, following operation is in acceptance.
(60) [District 2] (60) [District 0] (60) [District 1] (D0)
It requires no mutual address relation between the selected blocks from each District.
2001-03-05 30/43