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TH58100FT Datasheet, PDF (18/43 Pages) Toshiba Semiconductor – TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
Multi Block Erase Timing Diagram
CLE
CE
tCLS
tCS
tCLH
tCLS
WE
ALE
tALS
tALH
tWB
tBERASE
RE
I/O1
to I/O8
tDS tDH
60H
A9 to A17 to A25 to
A16 A24 A26
D0H
RY/BY
Auto Block
Erase Setup
command
Erase Start
command
Busy
Max 4 times repeat
: VIH or VIL
: Do not input data while data is being output.
TH58100FT
71H
Status
output
Status Read
command
2001-03-05 18/43