TH58100FT Datasheet, PDF (2/43 Pages) Toshiba Semiconductor – TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

BLOCK DIAGRAM
I/O1
to
I/O8
CE
CLE
ALE
WE
RE
WP
RY/BY
I/O Control circuit
Logic control
RY/BY
Status register
Address register
Command register
Control
HV generator
TH58100FT
V_CC V_SS
Column buffer
Column decoder
Data register
Sense amp
Memory cell array
ABSOLUTE MAXIMUM RATINGS
SYMBOL
RATING
V_CC
V_IN
V_I/O
P_D
T_solder
T_stg
T_opr
Power Supply Voltage
Input Voltage
Input/Output Voltage
Power Dissipation
Soldering Temperature (10s)
Storage Temperature
Operating Temperature
VALUE
-0.6 to 4.6
-0.6 to 4.6
-0.6 V to V_CC + 0.3 V (£ 4.6 V)
0.3
260
-55 to 150
0 to 70
CAPACITANCE *(Ta = 25°C, f = 1 MHz)
SYMB0L
PARAMETER
CONDITION
MIN
C_IN
Input
V_IN = 0 V
¾
C_OUT
Output
V_OUT = 0 V
¾
* This parameter is periodically sampled and is not tested for every device.
MAX
20
20
UNIT
V
V
V
W
°C
°C
°C
UNIT
pF
pF
2001-03-05 2/43