TM4C129XKCZAD Datasheet, PDF (927/2188 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C129XKCZAD Microcontroller
Bit/Field
5:4
3:2
1:0
Name
EPADR
ERSZ
ERADR
Type
RW
RW
RW
Reset
0x0
Description
External Peripheral Address
This field selects address mapping for the external peripheral area.
Value Description
0x0 Not mapped
0x1 At 0xA000.0000
0x2 At 0xC000.0000
0x3 Only to be used with Host Bus quad chip select. In quad chip
select mode, CS2n maps to 0xA000.0000 and CS3n maps to
0xC000.0000.
0x0
External RAM Size
This field selects the size of mapped RAM. If the size of the external
memory is larger, a bus fault occurs. If the size of the external memory
is smaller, it wraps (upper address bits unused):
Value Description
0x0 256 bytes; lower address range: 0x00 to 0xFF
0x1 64 KB; lower address range: 0x0000 to 0xFFFF
0x2 16 MB; lower address range: 0x00.0000 to 0xFF.FFFF
0x3 256 MB; lower address range: 0x000.0000 to 0xFFF.FFFF
0x0
External RAM Address
Selects address mapping for external RAM area:
Value Description
0x0 Not mapped
0x1 At 0x6000.0000
0x2 At 0x8000.0000
0x3 Only to be used with Host Bus quad chip select. In quad chip
select mode, CS0n maps to 0x6000.0000 and CS1n maps to
0x8000.0000.
June 18, 2014
927
Texas Instruments-Production Data