TM4C129XKCZAD Datasheet, PDF (607/2188 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C129XKCZAD Microcontroller
Register 13: Hibernation Calendar Control (HIBCALCTL), offset 0x300
The Hibernate calendar is enabled by setting the CALEN bit in the HIBCALCTL register. If the BCD
bit is set, the fields are reported in BCD format.
Hibernation Calendar Control (HIBCALCTL)
Base 0x400F.C000
Offset 0x300
Type RW, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
CAL24 reserved CALEN
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RW
RO
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:3
2
Name
reserved
CAL24
Type
RO
RW
Reset
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Calendar Mode
Value Description
0 12 hour, AM/PM Mode
1 24 hour mode
1
reserved
RO
0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
CALEN
RW
0
RTC Calendar/Counter Mode Select
Note that the RTC must be enabled by setting the RTCEN bit in the
HIBCTL register to use this mode select.
Value Description
0 RTC Counter mode enabled.
1 Calendar mode enabled
June 18, 2014
607
Texas Instruments-Production Data