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TM4C129XKCZAD Datasheet, PDF (1310/2188 Pages) Texas Instruments – Tiva Microcontroller
Analog-to-Digital Converter (ADC)
Register 65: ADC Peripheral Configuration (ADCPC), offset 0xFC4
The ADCPC register provides information regarding the configuration of the peripheral.
ADC Peripheral Configuration (ADCPC)
ADC0 base: 0x4003.8000
ADC1 base: 0x4003.9000
Offset 0xFC4
Type RW, reset 0x0000.0007
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
MCR
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
Bit/Field
31:4
3:0
Name
reserved
MCR
Type
Reset Description
RO 0x0000.0000 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
RW
0x7
Conversion Rate
This field specifies the relative sample rate of the ADC and is used in
run, sleep, and deep-sleep modes. It allows the application to reduce
the rate at which conversions are generated relative to the maximum
conversion rate.
Value Description
0x0
Reserved
0x1
Eighth conversion rate. After a conversion completes, the
logic pauses for 112 TADC periods before starting the next
conversion.
0x2
Reserved
0x3
Quarter conversion rate. After a conversion completes, the
logic pauses for 48 TADC periods before starting the next
conversion.
0x4
Reserved
0x5
Half conversion rate. After a conversion completes, the logic
pauses for 16 TADC periods before starting the next
conversion.
0x6
Reserved
0x7
Full conversion rate (FCONV) as defined by TADC and NSH.
0x8 - 0xF Reserved
1310
Texas Instruments-Production Data
June 18, 2014