TM4C129XKCZAD Datasheet, PDF (516/2188 Pages) Texas Instruments – Tiva Microcontroller

System Control
Register 171: CRC and Cryptographic Modules Power Control (PCCCM), offset
0x974
The PCCCM register controls the power applied to the CRC and AES, DES, and SHA/MD5 modules.
The function of this bit depends on the current state of the device (Run, Sleep or Deep-Sleep mode)
and value of the corresponding bits in the RCGCCCM, SCGCCCM and DCGCCCM registers. If the
Rn, Sn, or Dn bit of the respective RCGCCCM, SCGCCCM and DCGCCCM registers is 1 and the
device is in that mode, the module is powered and receives a clock irrespective of what the
corresponding Pn bit in the PCCCM register is.
However, if the Rn, Sn, or Dn bit of the respective RCGCCCM, SCGCCCM and DCGCCCM registers
is 0 and the device is in that mode, then the module behaves differently depending on the value of
the corresponding Pn bit in the PCCCM register. In this case, when the Pn bit is clear the module
is not powered and does not receive a clock. If the Pn bit is set, the module is powered but does
not receive a clock. The table below details the differences.
Table 5-33. Module Power Control
Rn, Sn or Dn Value in
Respective RCGCx,
SCGCx, or DCGCx
Register
0
0
1
Pn Description
0 Module is not powered and does not receive a clock. In this case, the peripheral's
state is not retained.
This is the lowest power consumption state of any peripheral since it consumes no
dynamic nor leakage current. Hardware should perform a peripheral reset if the active
mode changes and the RCGCx, SCGCx, or DCGCx register is a 1 or the P0 bit is
changed to a 1.
Software must re-initialize the peripheral when re-enabled due to the loss of state.
1 Module is powered, but does not receive a clock.
In this case, the peripheral is inactive. This is the second-lowest power consumption
of any peripheral since it consumes only leakage current.
X Module is powered and receives a clock.
CRC and Cryptographic Modules Power Control (PCCCM)
Base 0x400F.E000
Offset 0x974
Type RW, reset 0x0000.0001
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
P0
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
Bit/Field
31:1
Name
reserved
Type
RO
Reset
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
516
June 18, 2014
Texas Instruments-Production Data