DS92LV3221_14 Datasheet, PDF (9/30 Pages) Texas Instruments – 20-50 MHz 32-Bit Channel Link II Serializer / Deserializer

DS92LV3221, DS92LV3222
www.ti.com
SNLS319C – OCTOBER 2009 – REVISED APRIL 2013
DESERIALIZER SWITCHING CHARACTERISTICS
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Min
t_ROCP
Receiver Output Clock Period
t_ROCP = t_CIP
Figure 9
20
t_RODC
RxCLKOUT Duty Cycle
45
t_ROTR
t_ROTF
LVCMOS Low-to-High Transition
Time
LVCMOS High-to-Low Transition
Time
C_L = 8pF
(lumped load)
Figure 8
t_ROSC
RxOUT[31:0] Setup to RxCLKOUT f = 50 MHz
5.6
t_ROHC
RxOUT[31:0] Hold to RxCLKOUT
7.4
t_HZR
Data Output High to TRI-STATE
Figure 11
Delay
t_LZR
Data Output Low to TRI-STATE
Delay
t_ZHR
Data Output TRI-STATE to High
Delay
t_ZLR
Data Output TRI-STATE to Low
Delay
t_RD
Deserializer Porpagation Delay –
Latency
f = 20 MHz
Figure 10
f = 50 MHz
t_RPLLS
TOL_JIT
t_LVSKR
Deserializer PLL Lock Time
Deserializer Input Jitter Tolerance
LVDS Differential Input Skew
Tolerance
20 MHz – 50 MHz
Figure 11
See ⁽¹⁾
20 MHz – 50 MHz
Figure 15
(1) t_RPLLS is the time required by the Deserializer to obtain lock when exiting power-down mode.
Typ
t_ROCP
50
3.2
Max
50
55
3.5
0.5 x
t_ROCP
0.5 x
t_ROCP
5
10
5
10
5
10
5
5.5 x
t_ROCP +
3.35
5.5 x
t_ROCP +
6.00
0.25
10
128k x
t_ROCP
0.4 x
t_ROCP
Units
ns
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
UI
ns
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