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MSP430F5229 Datasheet, PDF (87/121 Pages) Texas Instruments – MSP430F522x and MSP430F521x Mixed-Signal Microcontrollers
www.ti.com
To XT2
MSP430F5229, MSP430F5227, MSP430F5224, MSP430F5222
MSP430F5219, MSP430F5217, MSP430F5214, MSP430F5212
SLAS718E – NOVEMBER 2012 – REVISED MAY 2014
Pad Logic
P5REN.3
P5DIR.3
0
1
P5OUT.3
Module X OUT
P5SEL.3
P5IN.3
Module X IN
0
1
EN
D
DVSS
0
DVCC
1
1
P5DS.3
0: Low drive
1: High drive
Bus
Keeper
P5.3/XT2OUT
Table 7-6. Port P5 (P5.2, P5.3) Pin Functions
PIN NAME (P5.x)
x
FUNCTION
P5DIR.x
CONTROL BITS AND SIGNALS(1)
P5SEL.2
P5SEL.3
XT2BYPASS
P5.2/XT2IN
2 P5.2 (I/O)
I: 0; O: 1
0
X
X
XT2IN crystal mode(2)
X
1
X
0
XT2IN bypass mode(2)
X
1
X
1
P5.3/XT2OUT
3 P5.3 (I/O)
XT2OUT crystal mode(3)
P5.3 (I/O)(3)
I: 0; O: 1
0
X
1
X
1
X
X
X
0
X
1
(1) X = Don't care
(2) Setting P5SEL.2 causes the general-purpose I/O to be disabled. Pending the setting of XT2BYPASS, P5.2 is configured for crystal
mode or bypass mode.
(3) Setting P5SEL.2 causes the general-purpose I/O to be disabled in crystal mode. When using bypass mode, P5.3 can be used as
general-purpose I/O.
Copyright © 2012–2014, Texas Instruments Incorporated
Input/Output Schematics
87
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MSP430F5214 MSP430F5212