MSP430F5229 Datasheet, PDF (51/121 Pages) Texas Instruments – MSP430F522x and MSP430F521x Mixed-Signal Microcontrollers

www.ti.com
MSP430F5229, MSP430F5227, MSP430F5224, MSP430F5222
MSP430F5219, MSP430F5217, MSP430F5214, MSP430F5212
SLAS718E – NOVEMBER 2012 – REVISED MAY 2014
6.2 CPU (Link to user's guide)
The MSP430 CPU has a 16-bit RISC
architecture that is highly transparent to the
application. All operations, other than program-
flow instructions, are performed as register
operations in conjunction with seven
addressing modes for source operand and four
addressing modes for destination operand.
The CPU is integrated with 16 registers that
provide reduced instruction execution time.
The register-to-register operation execution
time is one cycle of the CPU clock.
Four of the registers, R0 to R3, are dedicated
as program counter, stack pointer, status
register, and constant generator, respectively.
The remaining registers are general-purpose
registers.
Peripherals are connected to the CPU using
data, address, and control buses and can be
handled with all instructions.
The instruction set consists of the original 51
instructions with three formats and seven
address modes and additional instructions for
the expanded address range. Each instruction
can operate on word and byte data.
Program Counter
Stack Pointer
Status Register
Constant Generator
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
PC/R0
SP/R1
SR/CG1/R2
CG2/R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
6.3 Operating Modes
The MSP430 has one active mode and six software selectable low-power modes of operation. An interrupt
event can wake up the device from any of the low-power modes, service the request, and restore back to
the low-power mode on return from the interrupt program.
The following seven operating modes can be configured by software:
• Active mode (AM)
• Low-power mode 3 (LPM3)
– All clocks are active
– CPU is disabled
• Low-power mode 0 (LPM0)
– CPU is disabled
– ACLK and SMCLK remain active, MCLK
is disabled
– MCLK, FLL loop control, and DCOCLK
are disabled
– DCO's dc generator is disabled
– ACLK remains active
– FLL loop control remains active
• Low-power mode 4 (LPM4)
• Low-power mode 1 (LPM1)
– CPU is disabled
– CPU is disabled
– ACLK is disabled
– FLL loop control is disabled
– ACLK and SMCLK remain active, MCLK
is disabled
– MCLK, FLL loop control, and DCOCLK
are disabled
– DCO's dc generator is disabled
• Low-power mode 2 (LPM2)
– Crystal oscillator is stopped
– CPU is disabled
– Complete data retention
– MCLK, FLL loop control, and DCOCLK
are disabled
• Low-power mode 4.5 (LPM4.5)
– Internal regulator disabled
– DCO's dc-generator remains enabled
– No data retention
– ACLK remains active
– Wakeup from RST/NMI, P1, and P2
Copyright © 2012–2014, Texas Instruments Incorporated
Short-Form Description
51
Submit Documentation Feedback
Product Folder Links: MSP430F5229 MSP430F5227 MSP430F5224 MSP430F5222 MSP430F5219 MSP430F5217
MSP430F5214 MSP430F5212