MSP430F5229 Datasheet, PDF (83/121 Pages) Texas Instruments – MSP430F522x and MSP430F521x Mixed-Signal Microcontrollers

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MSP430F5229, MSP430F5227, MSP430F5224, MSP430F5222
MSP430F5219, MSP430F5217, MSP430F5214, MSP430F5212
SLAS718E – NOVEMBER 2012 – REVISED MAY 2014
7.3 Port P3, P3.0 to P3.4, Input/Output With Schmitt Trigger
P3REN.x
Pad Logic
P3DIR.x
From module
P3OUT.x
From module
P3SEL.x
P3IN.x
To module
0
1
0
1
EN
D
Direction
0: Input
1: Output
DV_SS
0
DV_IO
1
1
P3DS.x
0: Low drive
1: High drive
P3.0/UCB0SIMO/UCB0SDA
P3.1/UCB0SOMI/UCB0SCL
P3.2/UCB0CLK/UCA0STE
P3.3/UCA0TXD/UCA0SIMO
P3.4/UCA0RXD/UCA0SOMI
Table 7-3. Port P3 (P3.0 to P3.4) Pin Functions
PIN NAME (P3.x)
x
FUNCTION
CONTROL BITS AND
SIGNALS ⁽¹⁾
P3DIR.x
P3SEL.x
P3.0/UCB0SIMO/UCB0SDA 0 P3.0 (I/O)
UCB0SIMO/UCB0SDA^{(2) (3)}
I: 0; O: 1
0
X
1
P3.1/UCB0SOMI/UCB0SCL 1 P3.1 (I/O)
UCB0SOMI/UCB0SCL ^{(2) (3)}
I: 0; O: 1
0
X
1
P3.2/UCB0CLK/UCA0STE
2 P3.2 (I/O)
UCB0CLK/UCA0STE^{(2) (4)}
I: 0; O: 1
0
X
1
P3.3/UCA0TXD/UCA0SIMO 3 P3.3 (I/O)
UCA0TXD/UCA0SIMO ⁽²⁾
I: 0; O: 1
0
X
1
P3.4/UCA0RXD/UCA0SOMI 4 P3.4 (I/O)
UCA0RXD/UCA0SOMI ⁽²⁾
I: 0; O: 1
0
X
1
(1) X = Don't care
(2) The pin direction is controlled by the USCI module.
(3) If the I2C functionality is selected, the output drives only the logical 0 to V_SS level.
(4) UCB0CLK function takes precedence over UCA0STE function. If the pin is required as UCB0CLK input or output, USCI A0 is forced to
3-wire SPI mode if 4-wire SPI mode is selected.
Copyright © 2012–2014, Texas Instruments Incorporated
Input/Output Schematics
83
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