MSP430F5229 Datasheet, PDF (49/121 Pages) Texas Instruments – MSP430F522x and MSP430F521x Mixed-Signal Microcontrollers

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MSP430F5229, MSP430F5227, MSP430F5224, MSP430F5222
MSP430F5219, MSP430F5217, MSP430F5214, MSP430F5212
SLAS718E – NOVEMBER 2012 – REVISED MAY 2014
6 Short-Form Description
6.1 Functional Block Diagrams
6.1.1 Functional Block Diagram – F5229, F5227 – RGC, ZQE, YFF Packages
DVCC AVCC
XIN XOUT RSTDVCC RST/NMI BSLEN _{DVSS AVSS} DVIO VCORE
PA
P1.x
P2.x
PB
PC
PD PJ
P3.x P4.x P5.x P6.x P7.x PJ.x
XT2IN
XT2OUT
Unified
Clock
System
ACLK
SMCLK
128KB
64KB
MCLK
Flash
CPUXV2
and
Working
Registers
MAB
MDB
8KB
RAM
Power
SYS
Management _Watchdog
LDO
SVM/SVS
Brownout
Port Map
Control
(P4)
P1
P1
P2
P3
P4
P5
P6
P7
1×4 I/Os 1×4 I/Os 1×8 I/Os 1×5 I/Os 1×8 I/Os 1×6 I/Os 1×8 I/Os 1×6 I/Os
PA
1×16 I/Os
PB
1×13 I/Os
PC
1×14 I/Os
PD
PJ
1×6 I/Os 1×4 I/Os
I/O Ports
Interrupt and Wakeup
I/O Ports
USCI0,1
USCI_Ax:
UART,
IrDA, SPI
USCI_Bx:
SPI, I2C
DMA
3 Channel
EEM
(S: 3+1)
JTAG,
SBW
Interface
MPY32
TA0
Timer_A
5 CC
Registers
TA1
Timer_A
3 CC
Registers
TA2
Timer_A
3 CC
Registers
TB0
Timer_B
7 CC
Registers
RTC_A
CRC16
ADC10_A
10 Bit
200 KSPS
12 Channels
(10 ext,2 int)
REF
COMP_B
8 Channels
I/O are supplied by DVIO
6.1.2 Functional Block Diagram – F5224, F5222 – RGZ Package
DVCC AVCC
XIN XOUT RSTDVCC RST/NMI BSLEN DVSS AVSS DVIO VCORE
PA
P1.x
P2.x
PB
PC
PJ
P3.x P4.x P5.x P6.x _PJ.x
XT2IN
XT2OUT
Unified
Clock
System
ACLK
SMCLK
128KB
64KB
MCLK
Flash
8KB
RAM
Power
SYS
Management _Watchdog
LDO
SVM,SVS
Brownout
Port Map
Control
(P4)
P1
P1
P2
P3
P4
P5
P6
1×4 I/Os 1×4 I/Os 1×1 I/Os 1×5 I/Os 1×7 I/Os 1×6 I/Os 1×6 I/Os
PA
1×9 I/Os
PB
1×12 I/Os
PC
1×12 I/Os
PJ
1×4 I/Os
I/O Ports
Interrupt and Wakeup
I/O Ports
CPUXV2
and
Working
Registers
MAB
MDB
USCI0,1
USCI_Ax:
UART,
IrDA, SPI
USCI_Bx:
SPI, I2C
DMA
3 Channel
EEM
(S: 3+1)
JTAG,
SBW
Interface
MPY32
TA0
Timer_A
5 CC
Registers
TA1
Timer_A
3 CC
Registers
TA2
Timer_A
3 CC
Registers
TB0
Timer_B
7 CC
Registers
RTC_A
CRC16
ADC10_A
10 Bit
200 KSPS
10 Channels
(8 ext, 2 int)
REF
COMP_B
6 Channels
I/O are supplied by DVIO
Copyright © 2012–2014, Texas Instruments Incorporated
Short-Form Description
49
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