TM4C129ENCPDT Datasheet, PDF (837/2014 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C129ENCPDT Microcontroller
Table 11-6. Chip Select Configuration Register Assignment
Configuration Register^a
Corresponding Chip Select
EPIHBnCFG
CS0n
EPIHBnCFG2
CS1n
EPIHBnCFG3
CS2n
EPIHBnCFG4
CS3n
a. If the CSBAUD bit in the EPIHBnCFG2 register is clear and multiple chip selects are enabled, then all chip selects are
configured by the MODE bit field in the EPIHBnCFG register.
Note that multiple chip select modes do not allow the intermixing of Host-Bus 8 and Host-Bus16
modes.
When BSEL=1 in the EPIHB16CFG register, byte select signals are provided, so byte-sized data
can be read and written at any address, however these signals reduce the available address width
by 2 pins. The byte select signals are active Low. BSEL0n corresponds to the LSB of the halfword,
and BSEL1n corresponds to the MSB of the halfword.
When BSEL=0, byte reads and writes at odd addresses only act on the even byte, and byte writes
at even addresses write invalid values into the odd byte. As a result, accesses should be made as
half-words (16-bits) or words (32-bits). In C/C++, programmers should use only short int and long
int for accesses. Also, because data accesses in HB16 mode with no byte selects are on 2-byte
boundaries, the available address space is doubled. For example, 28 bits of address accesses 512
MB in this mode. Table 11-7 on page 837 shows the capabilities of the HB8 and HB16 modes as
well as the available address bits with the possible combinations of these bits.
Although the EPI0S31 signal can be configured for the EPI clock signal in Host-Bus mode, it is not
required and should be configured as a GPIO to reduce EMI in the system.
Table 11-7. Capabilities of Host Bus 8 and Host Bus 16 Modes
Host Bus
Type
HB8
HB8
HB8
HB8
HB8
HB8
HB8
HB8
HB8
HB8
HB8
HB8
HB8
HB8
HB8
HB8
HB8
MODE
0x0
0x0
0x0
0x0
0x0
0x0
0x1
0x1
0x1
0x1
0x1
0x1
0x2
0x3
0x3
0x3
0x3
CSCFGEXT
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
CSCFG
0x0, 0x1
0x2
0x3
0x0
0x1
0x2
0x0, 0x1
0x2
0x3
0x0
0x1
0x2
0x1
0x1
0x3
0x0
0x1
Max # of
External
Devices
1
2
2
1
4
4
1
2
2
1
4
4
1
1
2
1
4
BSEL
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Byte Access
Always
Always
Always
Always
Always
Always
Always
Always
Always
Always
Always
Always
Always
Always
Always
Always
Always
Available
Address
28 bits
27 bits
26 bits
27 bits
27 bits
26 bits
20 bits
19 bits
18 bits
19 bits
19 bits
18 bits
20 bits
none
none
none
none
Addressable
Memory
256 MB
128 MB
64 MB
128 MB
128 MB
64 MB
1 MB
512 kB
256 kB
512 kB
512 MB
256 kB
1 MB
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June 18, 2014
837
Texas Instruments-Production Data