TM4C129ENCPDT Datasheet, PDF (1461/2014 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C129ENCPDT Microcontroller
Bit/Field
5
4
3
2
1
0
Name
TXIM
DMATXIM
DMARXIM
STOPIM
STARTIM
DATAIM
Type
RW
Reset
0
Description
Transmit FIFO Request Interrupt Mask
Value Description
0 The TXRIS interrupt is suppressed and not sent to the interrupt
controller.
1 The TX FIFO Request interrupt is sent to the interrupt controller
when the TXRIS bit in the I2CSRIS register is set.
RW
0
Transmit DMA Interrupt Mask
Value Description
0 The DMATXRIS interrupt is suppressed and not sent to the
interrupt controller.
1 The transmit DMA complete interrupt is sent to the interrupt
controller when the DMATXRIS bit in the I2CSRIS register is set.
RW
0
Receive DMA Interrupt Mask
Value Description
0 The DMARXRIS interrupt is suppressed and not sent to the
interrupt controller.
1 The receive DMA complete interrupt is sent to the interrupt
controller when the DMARXRIS bit in the I2CSRIS register is set.
RW
0
Stop Condition Interrupt Mask
Value Description
0 The STOPRIS interrupt is suppressed and not sent to the
interrupt controller.
1 The STOP condition interrupt is sent to the interrupt controller
when the STOPRIS bit in the I2CSRIS register is set.
RW
0
Start Condition Interrupt Mask
Value Description
0 The STARTRIS interrupt is suppressed and not sent to the
interrupt controller.
1 The START condition interrupt is sent to the interrupt controller
when the STARTRIS bit in the I2CSRIS register is set.
RW
0
Data Interrupt Mask
Value Description
0 The DATARIS interrupt is suppressed and not sent to the
interrupt controller.
1 Data interrupt sent to interrupt controller when DATARIS bit in
the I2CSRIS register is set.
June 18, 2014
Texas Instruments-Production Data
1461