TM4C129ENCPDT Datasheet, PDF (1383/2014 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C129ENCPDT Microcontroller
Register 9: QSSI Interrupt Clear (SSIICR), offset 0x020
The SSIICR register is the interrupt clear register. On a write of 1, the corresponding interrupt is
cleared. A write of 0 has no effect.
QSSI Interrupt Clear (SSIICR)
QSSI0 base: 0x4000.8000
QSSI1 base: 0x4000.9000
QSSI2 base: 0x4000.A000
QSSI3 base: 0x4000.B000
Offset 0x020
Type W1C, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
EOTIC DMATXIC DMARXIC
reserved
RTIC RORIC
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
W1C
W1C
W1C
RO
RO
W1C
W1C
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:7
6
5
4
3:2
1
0
Name
reserved
EOTIC
DMATXIC
DMARXIC
reserved
RTIC
RORIC
Type
RO
W1C
W1C
W1C
RO
W1C
W1C
Reset
0
0
0
0
0x0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
End of Transmit Interrupt Clear
Writing a 1 to this bit clears the EOTRIS bit in the SSIRIS register and
the EOTMIS bit in the SSIMIS register.
QSSI Transmit DMA Interrupt Clear
Writing a 1 to this bit clears the DMATXRIS bit in the SSIRIS register
and the DMATXMIS bit in the SSIMIS register.
QSSI Receive DMA Interrupt Clear
Writing a 1 to this bit clears the DMARXRIS bit in the SSIRIS register
and the DMARXMIS bit in the SSIMIS register.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
QSSI Receive Time-Out Interrupt Clear
Writing a 1 to this bit clears the RTRIS bit in the SSIRIS register and
the RTMIS bit in the SSIMIS register.
QSSI Receive Overrun Interrupt Clear
Writing a 1 to this bit clears the RORRIS bit in the SSIRIS register and
the RORMIS bit in the SSIMIS register.
June 18, 2014
Texas Instruments-Production Data
1383