TM4C129ENCPDT Datasheet, PDF (677/2014 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C129ENCPDT Microcontroller
Register 36: Flash Memory Protection Read Enable 0 (FMPRE0), offset 0x200
Register 37: Flash Memory Protection Read Enable 1 (FMPRE1), offset 0x204
Register 38: Flash Memory Protection Read Enable 2 (FMPRE2), offset 0x208
Register 39: Flash Memory Protection Read Enable 3 (FMPRE3), offset 0x20C
Register 40: Flash Memory Protection Read Enable 4 (FMPRE4), offset 0x210
Register 41: Flash Memory Protection Read Enable 5 (FMPRE5), offset 0x214
Register 42: Flash Memory Protection Read Enable 6 (FMPRE6), offset 0x218
Register 43: Flash Memory Protection Read Enable 7 (FMPRE7), offset 0x21C
Register 44: Flash Memory Protection Read Enable 8 (FMPRE8), offset 0x220
Register 45: Flash Memory Protection Read Enable 9 (FMPRE9), offset 0x224
Register 46: Flash Memory Protection Read Enable 10 (FMPRE10), offset
0x228
Register 47: Flash Memory Protection Read Enable 11 (FMPRE11), offset
0x22C
Register 48: Flash Memory Protection Read Enable 12 (FMPRE12), offset
0x230
Register 49: Flash Memory Protection Read Enable 13 (FMPRE13), offset
0x234
Register 50: Flash Memory Protection Read Enable 14 (FMPRE14), offset
0x238
Register 51: Flash Memory Protection Read Enable 15 (FMPRE15), offset
0x23C
Note: The FMPRE0 register is aliased for backwards compatibility.
Note: Offset is relative to System Control base address of 0x400F.E000.
This register stores the read-only protection bits for each 2-KB flash block (FMPPEn stores the
execute-only bits). Note that for protecting sectors, eight bits need to be cleared to create a 16-KB
read-protected sector.
This register is loaded during the power-on reset sequence. The factory settings for the FMPREn
and FMPPEn registers are a value of 1 for all implemented banks. This achieves a policy of open
access and programmability. The register bits may be changed by writing the specific register bit.
However, this register is RW0; the user can only change the protection bit from a 1 to a 0 (and may
NOT change a 0 to a 1). The changes are not permanent until the register is committed (saved), at
which point the bit change is permanent. If a bit is changed from a 1 to a 0 and not committed, it
may be restored by executing a power-on reset sequence. The reset value shown only applies to
power-on reset; any other type of reset does not affect this register. Once committed, the only way
to restore the factory default value of this register is to perform the "Recover Locked Device" sequence
detailed in the JTAG chapter.
Each FMPREn register controls a 64K block. For additional information, see “Protected Flash
Memory Registers” on page 617.
June 18, 2014
677
Texas Instruments-Production Data