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TMS320VC5507_14 Datasheet, PDF (77/137 Pages) Texas Instruments – Fixed-Point Digital Signal Processor
Electrical Specifications
5.2.3 Recommended Operating Conditions for CVDD = 1.6 V (200 MHz)
MIN
NOM
MAX
UNIT
Core
CVDD
Peripherals
Device supply voltage
1.55
1.6
1.65
V
RCVDD
RTC module supply voltage, core
1.55
RDVDD
RTC module supply voltage, I/O (RTCINX1 and RTCINX2)
1.55
USBPLLVDD USBPLL supply voltage†
1.55
USBVDD
USB module supply voltage, I/O (DP, DN, and PU)
3
DVDD
Device supply voltage, I/O (except DP, DN, PU, SDA, SCL)‡
2.7
ADVDD
A/D module digital supply voltage
2.7
AVDD
A/D module analog supply voltage
2.7
Grounds
1.6
1.65
V
1.6
1.65
V
1.6
1.65
V
3.3
3.6
V
3.3
3.6
V
3.3
3.6
V
3.3
3.6
V
VSS
Supply voltage, GND, I/O, and core
0
V
ADVSS
Supply voltage, GND, A/D module, digital
0
V
AVSS
Supply voltage, GND, A/D module, analog
0
V
USBPLLVSS Supply voltage, GND, USBPLL
0
V
DN and DP§
2.0
VIH
High-level input voltage, I/O
SDA & SCL: VDD related input
levels‡
0.7*DVDD
All other inputs
(including hysteresis inputs)
2.0
DN and DP§
DVDD(max) +0.5
V
DVDD + 0.3
0.8
VIL
Low-level input voltage, I/O
SDA & SCL: VDD related input
levels‡
−0.5
All other inputs
(including hysteresis inputs)
−0.3
0.3 * DVDD
V
0.8
Vhys
IOH
IOL
Hysteresis level
Inputs with hysteresis only
0.1*DVDD
V
High-level output current
DN and DP§ (VOH = 2.45 V)
All other outputs
−17.0
mA
−4
Low-level output current
DN and DP§ (VOL = 0.36 V)
17.0
SDA and SCL‡
3
mA
All other outputs
4
TC
Operating case temperature
−40
85
_C
† USB PLL is susceptible to power supply ripple. The maximum allowable supply ripple is 1% for 1 Hz to 5 kHz; 1.5% for 5 kHz to 10 MHz; 3%
for 10 MHz to 100 MHz, and less than 5% for 100 MHz or greater.
‡ The I2C pins SDA and SCL do not feature fail-safe I/O buffers. These pins could potentially draw current when the device is powered down.
Due to the fact that different voltage devices can be connected to the I2C bus, the level of logic 0 (low) and logic 1 (high) are not fixed and
depends on the associated VDD.
§ USB I/O pins DP and DN can tolerate a short circuit at D+ and D− to 0 V or 5 V, as long as the recommended series resistors (see Figure 5−40)
are connected between the D+ and DP (package), and the D− and DN (package). Do not apply a short circuit to the USB I/O pins DP and DN
in absence of the series resistors.
April 2004 − Revised January 2008
SPRS244J
77